Overview

The aim of this document is to explain how to setup pins of SP7350 in device-tree source. SP7350 has 106 general purpose IO (GPIO) pins which are multiplexed with other special functions, like eMMC device, SPI-NOR flash, SPI-NAND flash, Ethernet PHY (RGMII or RMII interface), UART, I2C pins, and etc.

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SP7350 has 106 GPIO pins. ID is from 0 to 105. Name is in form of GPIO(id), like GPIO0, GPIO1, GPIO2, GPIO99, GPIO105, and etc. There are two kinds of GPIO pins. One is 1.8V GPIO pins, and the other is 1.8V/3.0V Dual Voltage IO (DVIO) pins. Beside configure 1.8V or 3.0V power to power supply of a DVIO group in your circuit boards (hardware), you need to setup MS control in device-tree source. Refer to groups of GPIO and DVIO in appendix GPIO Table below in details.

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String“EMMC” is defined for the only pin-group of eMMC .That is, which is mapped to GPIO [20, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37]. Refer to "Function-group Table" in Appendix.

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String“GMAC_RGMII” is defined for the pin-group of GMAC .That is, which is mapped to GPIO [3, 4, 5, 6, 13, 14, 10, 11, 7, 8, 15, 16, 9, 12]. Refer to "Function-group Table" in Appendix.

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String“SD_CARD” is defined for the pin-group of SD card .That is, which is mapped to GPIO [38, 39, 40, 41, 42, 43]. Refer to "Function-group Table" in Appendix.

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String“SDIO” is defined for the pin-group of SDIO .That is, which is mapped to GPIO [44, 45, 46, 47, 48, 49]. Refer to "Function-group Table" in Appendix.

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String“SPI_FLASH” is defined for the pin-group of SPI-NOR FLASH .That is, which is mapped to GPIO [21, 22, 23, 24, 25, 26]. Refer to "Function-group Table" in Appendix.

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Pins of SPI-NAND flash of SP7350, [D0, D2, CLK, D1, D3, CSB], can be multiplexed to either pin-group either GPIO [30, 31, 32, 33, 34, 35] or pin-group GPIO [21, 22, 23, 24, 25, 26].

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String “SPI_NAND_X1” is defined for the pin-group 1 of SPI-NAND flash which is mapped to GPIO [30, 31, 32, 33, 34, 35]. Users can also use string “SPI_NAND_X2” for the pin-group 2 which is mapped to GPIO [21, 22, 23, 24, 25, 26]. Refer to "Function-group Table" in Appendix.

8-bit NAND FLASH

Pins of 8bit8-bit NAND FLASH flash of SP7350, [RDY0, WP_B, CE_B, RE_B, CLE, ALE, WE_B, D0, D1, D2, D3, D4, D5, D6, D7], can be multiplexed to pin-group GPIO [20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36].

To set up 8bit8-bit NAND FLASH pins, users need to add properties pinctrl-names and pinctrl-0 to 8bit8-bit NAND FLASH flash node paranand@f8120000 in device-tree source file. For example:

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String“PARA_NAND” is defined for the pin-group of 8bit8-NAND FLASH.That is, bit NAND flash which is mapped to GPIO [20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36]. Refer to "Function-group Table" in Appendix.

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Pins of UART0 of SP7350, [TXD, RXD], can be multiplexed to either pin-group GPIO [50, 51] or pin-group GPIO [68, 69].

To set up UART0 pins, users need to add properties pinctrl-names and pinctrl-0 to UART0 node serial@f8801900 in device-tree source file. For example:

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String“UART0_X1” is defined for the pin-group 1 of UART0 .That is, which is mapped to GPIO [50, 51]. Users can also use string “UART0_X2” is defined for the pin-group 2 which is mapped to GPIO [68, 69]. Refer to "Function-group Table" in Appendix.

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Pins of UART1 of SP7350, [TXD, RXD], RTS_D, CTS_Dcan be multiplexed to either pin-group GPIO [52, 53] or pin-group GPIO [64, 65]. Flow-control pins of UART1 of SP7350, [RTS, CTS], can be multiplexed to either pin-group GPIO [52, 53, 54, 55] or pin-group GPIO [66, 67].

To set up UART1 pins, users need to add properties pinctrl-names and pinctrl-0 to UART1 node serial@f8801980 in device-tree source file. For example:

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uart1: serial@f8801980 {
  	:
  	:
  	pinctrl-names = "default";
  	pinctrl-0 = <&uart1_pins &uart1_fc_pins>;
    :
    :
};

The following device-tree source of SP7350 shows definition of sub-nodes pinmux_uart1-pins and pinmux_uart1_fc-pins of node pinctrl@f8800080.If flow-control is needed, for example:

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uart1_pins: pinmux_uart1-pinsserial@f8801980 {
  	:
 function = "UART1";
    	:
  	pinctrl-names = "default";
  	pinctrl-0 = <&uart1_pins &uart1_fc_pins>;
    :
    :
};

The following device-tree source of SP7350 shows definition of sub-nodes pinmux_uart1-pins and pinmux_uart1_fc-pins of node pinctrl@f8800080.

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uart1_pins: pinmux_uart1-pins {
    function = "UART1";
    groups = "UART1_X1";
};

uart1_fc_pins: pinmux_uart1_fc-pins {
    function = "UART1_FC";
    groups = "UART1_FC_X1";
};

String“UART1_X1”and ” is defined for the pin-group 1 of UART1 which is mapped to GPIO [52, 53]. Users can also use string“UART1_X2” for the pin-group 2 which is mapped to GPIO [64, 65].

String "UART1_FC_X1" are defined for the pin-groups 1 of flow-control of UART1 .That is, which is mapped to GPIO [5254, 53] and 55]. Users can also use string "UART1_FC_X2" for the pin-groups 2 which is mapped to GPIO [54, 55]. Refer to "Function-group Table" in Appendix.

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Pins of I2C0 of SP7350, [CLK, DATA], can be multiplexed to either pin-group GPIO [68, 69] or pin-group GPIO [54, 55].

To set up I2C0 pins, users need to add properties pinctrl-names and pinctrl-0 to I2C0 node i2c@f8828000 in device-tree source file. For example:

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String“I2C_COMBO0_X1” is defined for the pin-group 1 of I2C0 .That is, which is mapped to GPIO [68, 69]. Refer to "Function-group Users can also use string“I2C_COMBO0_X1” for the pin-group 2 of I2C0 which is mapped to GPIO [54, 55]. Refer to "Function-group Table" in Appendix.

PWM

Pins PWM0 of PWM of SP7350, [PWM_CH0] [PWM_CH1] [PWM_CH2] [PWM_CH3], SP7350 can be multiplexed to either pin-group GPIO [78] or pin-group GPIO [58]. PWM1 can be multiplexed to either pin GPIO [79] or GPIO [59]. PWM2 can be multiplexed to either pin-group GPIO [78], [79], [60], [61] .To set up PWM pins, users need to add properties pinctrl-names and pinctrl-0 to PWM node pwm@f8800d80 in device-tree source file. For example60] or pin-group GPIO [92]. PWM3 can be multiplexed to either pin-group GPIO [61] or pin-group GPIO [93].

To set up PWM pins, users need to add properties pinctrl-names and pinctrl-0 to PWM node pwm@f8800d80 in device-tree source file. For example, set up PWM0:

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pwm: pwm@f8800d80 {
  	:
  	:
  	pinctrl-names = "default";
  	pinctrl-0 = <&pwm0_pins>;
    :
    :
};

Or, for example, set up PWM0, PWM1, PWM2, PWM3:

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pwm: pwm@f8800d80 {
  	:
  	:
  	pinctrl-names = "default";
  	pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins &pwm3_pins>;
    :
    :
};

The following device-tree source of SP7350 shows definitions of sub-nodes

pinmux_pwm0-pins，pinmuxpins, pinmux_pwm1-pins，pinmuxpins, pinmux_pwm2-pins，pinmuxpins, pinmux_pwm3-pins

of node pinctrl@f8800080.

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String“PWM0_X1” is defined for the pin-group 1 of PWM0 . That is, GPIO [78which is mapped to GPIO [78]. Users can also use string“PWM0_X2” for pin group 2 which is mapped to GPIO [58].

String“PWM1_X1” is defined for the pin-group 1 of PWM1 . That is, GPIO [79which is mapped to GPIO [79]. Users can also use string“PWM1_X2” for pin group 2 which is mapped to GPIO [59].

String“PWM2_X1” is defined for the pin-group 1 of PWM2 . That is, GPIO [60which is mapped to GPIO [60]. Users can also use string“PWM2_X2” for pin group 2 which is mapped to GPIO [92].

String“PWM3_X1” is defined for the pin-group 1 of PWM3 . That is, GPIO [61which is mapped to GPIO [61]. Users can also use string“PWM3_X2” for pin group 2 which is mapped to GPIO [93].

Refer to "Function-group Table" in Appendix.

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uart0_pins: pinmux_uart0-pins {
    	groupsfunction = "UART0_X1";
  	groups  function = "UART0_X1";
    drive-strength-microamp = <SPPCTRL_DVIO_DRV_IOH_15200_IOL_18700UA>;
};

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uart0_pins: pinmux_uart0-pins {
  	pinmux{
        groupsfunction = "UART0_X1";
        	functiongroups = "UART0UART0_X1";
    };
    
    pinconf_tx {
        pins = "GPIO50";
        drive-strength-microamp = <SPPCTRL_DVIO_DRV_IOH_15200_IOL_18700UA>;
    };
  
    pinconf_rx {
        pins = "GPIO51";
        drive-strength-microamp = <SPPCTRL_DVIO_DRV_IOH_17700_IOL_21800UA>;
    };
};

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SD card with typical drive source current 17.7mA（min (Min: 6.5mA, Max: 34.6mA） 6mA) for DVIO.

See Appendix/drive_strength_table below.

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SDIO with typical drive source current 17.7mA（min (Min: 6.5mA, Max: 34.6mA） 6mA) for DVIO.

See Appendix/drive_strength_table below.

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TXD0(GPIO7), TXD1(GPIO8), TXC(GPIO10), TXEN(GPIO11), TXD2(GPIO15), TXD3(GPIO16) with typical drive source current 16.4mA（min (Min: 11.3mA, Max: 21.6mA） 6mA) for GPIO.
RXC(GPIO3), RXDV(GPIO4), RXD0(GPIO5), RXD1(GPIO6), RXD2(GPIO13), RXD3(GPIO14) with typical drive source current 8.2mA（min (Min: 5.7mA, Max: 10.8mA）for 8mA) for GPIO.
MDC(GPIO9), MDIO(GPIO12) with typical drive source current 8.2mA（min (Min: 5.7mA, Max: 10.8mA）for 8mA) for GPIO.

See Appendix/drive_strength_table below.

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eMMC with typical drive source current 17.7mA（min (Min: 6.5mA, Max: 34.6mA） 6mA) for DVIO.

See Appendix/drive_strength_table below.

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I2C0 with typical drive source current 15.2mA（min (Min: 5.6mA, Max: 29.7mA） 7mA) for DVIO.

See Appendix/drive_strength_table below.

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I2C1 with typical drive source current 15.2mA（min (Min: 5.6mA, Max: 29.7mA） 7mA) for DVIO.

See Appendix/drive_strength_table below.

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I2C2 with typical drive source current 15.2mA（min (Min: 5.6mA, Max: 29.7mA） 7mA) for DVIO.

See Appendix/drive_strength_table below.

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I2C3 with typical drive source current 9.9mA（min (Min: 6.8mA, Max: 13.0mA） 0mA) for GPIO.

See Appendix/drive_strength_table below.

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I2C6 with typical drive source current 16.4mA（min4mA (Min: 11.3mA, Max: 21.6mA） )for GPIO.