Overview
The aim of this document is to explain how to setup pins of SP7350 in device-tree source. SP7350 has 106 general purpose IO (GPIO) pins which are multiplexed with other special functions, like eMMC device, SPI-NOR flash, SPI-NAND flash, Ethernet PHY (RGMII or RMII interface), UART, I2C pins, and etc.
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SP7350 has 106 GPIO pins. ID is from 0 to 105. Name is in form of GPIO(id), like GPIO0, GPIO1, GPIO2, GPIO99, GPIO105, and etc. There are two kinds of GPIO pins. One is 1.8V GPIO pins, and the other is 1.8V/3.0V Dual Voltage IO (DVIO) pins. Beside configure 1.8V or 3.0V power to power supply of a DVIO group in your circuit boards (hardware), you need to setup Voltage Mode Select (MS control) in device-tree source. Refer to groups of GPIO and DVIO in appendix GPIO Table below in details.
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Properties | Values | Descriptions |
bias-disable | NA | Disable pull-up, pull-down and strong pull-up |
bias-high-impedance | NA | |
bias-pull-up | NA | |
bias-pull-down | NA | |
drive-open-drain | NA | |
drive-strength-microamp | 0 ~ 15… | Refer to Driving-strength Table of GPIO and DVIO. |
function | … | Refer to Function-group Table |
groups | … | Refer to Function-group Table |
input-disable | NA | |
input-enable | NA | |
input-schmitt-disable | NA | |
input-schmitt-enable | NA | |
output-disable | NA | |
output-enable | NA | |
output-high | NA | |
output-low | NA | |
pins | “GPIO0” ~ “GPIO105” | |
sunplus,bias-strong-pull-up | NA | For GPIO only, excluding DVIO |
sunplus,input-invert-disable | NA | |
sunplus,input-invert-enable | NA | |
sunplus,ms-dvio-group-0 | “1V8” or “3V0” | For G_MX21 - G_MX27 |
sunplus,ms-dvio-group-1 | “1V8” or “3V0” | For G_MX20, G_MX28 - G_MX37 |
sunplus,ms-dvio-ao-group-0 | “1V8” or “3V0” | For AO_MX0 - AO_MX9 |
sunplus,ms-dvio-ao-group-1 | “1V8” or “3V0” | For AO_MX10 - AO_MX19 |
sunplus,ms-dvio-ao-group-2 | “1V8” or “3V0” | For AO_MX20 - AO_MX29 |
sunplus,output-invert-disable | NA | |
sunplus,output-invert-enable | NA |
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