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x-boot (external boot code) is a first-stage boot-loader placed in eMMC, NAND flash, or SD cards, loaded into system SRAM by i-boot. As it runs on SRAM, its size (including code, data, and stack) must not exceed the system SRAM's capacity. The primary task of x-boot is to initialize the DRAM DRR controller and PHY, perform calibration on DRAM DRR PHY and signals, and once calibrated, the DRAM is ready for use.

x-boot then switches the CPU from 32-bit mode to 64-bit mode and loads loads image of TF-A, OP-TEE and U-Boot from external storage into DRAM, executing TF-A.

x-boot (external boot code) is the first-stage boot loader. It is loaded into internal SRAM and run by internal ROM code of SP7350. Note that before X-Boot initializes and trains DRAM controller, DRAM is not available.

x-boot initializes and trains the SDRAM controller, preparing the DRAM for use. Subsequently, it loads the TF-A (Trusted Firmware-A) and OP-TEE (Open Portable Trusted Execution Environment) images from the fip (firmware image package) partition within ISPBOOOT.BIN, storing them in DRAM. Additionally, the U-Boot image is extracted from offset 0x30000 of ISPBOOOT.BIN and stored in DRAM. Upon successful checksum verification for all images, the system proceeds to execute TF-A, followed by OP-TEE, and finally U-Boot.

x-boot is loaded and run at SRAM before DRAM is available.

x-boot is responsible for doing DDR SDRAM training.

x-boot is responsible for loading U-Boot image.

x-boot is responsible for loading and running TF-A and OP-TEE OS.

. Wake up all other CPU core and let CPU switch from from 32-bit mode to 64-bit mode. Finally, execute TF-A.

Features

1. Output log at UART0 (at 115,200 bps ).Support accessing OTP using Sunplus OTPTool via UART0set by i-boot).

2. Support loading firmware of LPDDR4/DDR4/DDR3 DDR3, DDR4 or LPDDR4 from boot devices.

3. Support initialize DDR controller and PHY.

4. Support 1D and 2D training of LPDDR4PHY for DDR3, DDR4, and DDR3 SDRAMLPDDR4.

5. Support loading image of TF-A (BL31), OP-TEE (BL32) and U-Boot (BL33) from boot devices.

6. Support secure-boot:

   1. Verify digital signature of fip (TF-A and OP-TEE) and U-Boot images.

   2. Decrypt fip image.

7. Support warm-boot.

8. Switch CA55 to 64-bit mode and jump to run TF-A.

9. Support read and write OTP bit using Sunplus OTPTool through UART0.

Flow

The x-boot starts with the “_start” subroutine (assembly code) responsible for initializing start.S reset vector, followed by the execution of the "cpu_init" subroutine responsible for initializing C execution environment. The flow then advances to execute the "xboot_main" subroutine, serving as the C main function within x-boot.

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“xboot_main()” subroutine starts with “init_cdata” subroutine for initializing C global data. Then “init_uart()” subroutine for initializing all UARTs, “init_hw” subroutine for initializing hardware. Finally, run “boot_flow()”.

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“boot_flow()” starts with initializing DDR controller and PHY, and then train PHY. Next, initialize the controller of boot-device which is recorded in C structure g_bootinfo. Subsequently, it loads the fip (firmware image package) image and U-Boot image from fip and U-Boot partitions within ISPBOOOT.BIN, storing them in DRAM, respectively. Finally, it proceeds to execute “boot_uboot()” subroutine.

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“boot_uboot()” subroutine starts with verify image of fip and U-Boot. If verification is successful, it moves TF-A (Trusted Firmware-A) and OP-TEE (Open Portable Trusted Execution Environment) images from the load position to dedicated location of DRAM. Subsequently, it setup CPU reset vector to entry-point of a64 module for all cores and then issue a warm-reset to switch CPU (core 0) to 64-bit (aarch64) mode.

In a64up mode, CPU core 0 wakes up core 1, 2 and3, and switch them 64-bit (aarch64) mode. Then all core make a jump to Tf-A.

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The following illustrates the process from reset vector of i-boot to jump to TF-A for all cores.

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Drivers locations and features

x-boot supports many device drivers for accessing devices. The following table shows the locations of drivers in project diretory boot/xboot/ and features of each driver.

Other files

The following table shows the locations of important forlders or files of x-boot in project diretory boot/xboot/.

All defconfig files are placed at configs/. Normally, the file name proceed with sp7350- and followed by defconfig, like sp7350_emmc_ev_defconfig, sp7350_sdcard_ev_defconfig, and etc.

Flow

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SRAM Space Allocation

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