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Subsequently, x-boot loads the images of TF-A (BL31), OP-TEE (BL32), and U-Boot (BL33) from a storage device into DRAM. The CPU (core 0) then switches itself from 32-bit mode to 64-bit by triggering a software reset. It proceeds to awaken other cores (core 1, 2, 3) and transitions them to 64-bit mode. Finally, all cores execute TF-A.

Contents

Features

1. Output log at UART0 (at 115,200 bps set by i-boot).

2. Support loading firmware of DDR3, DDR4 or LPDDR4 from boot devices.

3. Support initialize DDR controller and PHY.

4. Support 1D and 2D training of PHY for DDR3, DDR4, and LPDDR4.

5. Support loading image of TF-A (BL31), OP-TEE (BL32) and U-Boot (BL33) from boot devices.

6. Support secure-boot:

   1. Verify digital signature of fip (TF-A and OP-TEE) and U-Boot images.

   2. Decrypt fip image.

7. Support warm-boot.

8. Switch CA55 to 64-bit mode and jump to run TF-A.

9. Support read and write OTP bit using Sunplus OTPTool through UART0.

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