This manual describes how to use the C3V-W Dual EVB (Evaluation Board). C3V-W (LPDDR4) Dual EVB consists of two C3V-W chipssubsystems. One is master which runs Linux software and the other is slave which provides extra 3.75 GiB DRAM, a NPU, and other peripherals (USB3, SD card, GPIO, clock, reset and etc.). Refe to functional block diagram of C3V-W (LPDDR4) Daul EVB, Master C3V-W subsystem has 8 GiB eMMC, 8 GiB LPDDR4 SDRAM, SD card, USB3 and 1000M Ethernet. Slave C3V-W subsystem has 8 GiB eMMC, 8 GiB LPDDR4 SDRAM, SD card and USB3. CPIO interface connect AXI bus of two subsystems together.
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Table of Contents
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Items | Subsystem | Explanations |
1 | -Global | 12V DC power input. The diameter of the DC Jack plug is 5.5mm. The power supply current of the adapter must be greater than 1A. |
2 | -Global | Main-power switch. Turn down to ON, and turn up to OFF. |
3 | Slave | Pin-headers (3x1, 100mill) of GPIO of Slave C3V-W |
4 | Slave | CM4 console (UA6) of Slave C3V-W. Note GND is at the most bottom pin. It is default serial port of Cortex M4. The default baud rate is 115,200. No parity and 1 stop-bit. |
5 | Slave | Main console (UA0) of Slave C3V-W. Note GND is at the most bottom pin. This is default serial port of i-boot, x-boot, Trusted Firmware-A (TF-A), U-Boot and Linux kernel. The default baud rate is 115,200. No parity and 1 stop-bit. |
6 | Slave | 8 GiB LPDDR4 SDRAM of Slave C3V-W |
7 | -Global | Boot configuration switch |
8 | Master | Socket of micro SD card of Master C3V-W |
9 | Slave | Type C socket of USB 3.1 Gen1 of Slave C3V-W. It supports Low/Full/High/Super speeds, supports Host, Device and DRD. Current limit of VBUS is 1A. |
10 | Slave | Slave C3V-W chip (15mm x 15mm, 526-pin, TF-BGA) |
11 | Slave | 8 GiB eMMC of Slave C3V-W |
12 | Master | RJ-45 socket of Ethernet of Master C3V-W. It supports 10M/100M/1000M speeds. |
13 | Slave | Socket of micro SD card of Slave C3V-W |
14 | Master | 8 GiB eMMC of Master C3V-W |
15 | Master | Master C3V-W chip (15mm x 15mm, 526-pin, TF-BGA) |
16 | Master | Type C socket of USB 3.1 Gen1 of Master C3V-W. It supports Low/Full/High/Super speeds, supports Host, Device and DRD. Current limit of VBUS is 1A. |
17 | -Global | Reset key. Reset CM4 and main power-domains, but does not reset RTC. |
18 | Master | CM4 console (UA6) of Master C3V-W. Note GND is at the most left pin. It is default serial port of Cortex M4. The default baud rate is 115,200. No parity and 1 stop-bit. |
19 | Master | 8 GiB LPDDR4 SDRAM of Master C3V-W |
20 | Master | Main console (UA0) of Master C3V-W. Note GND is at the most right pin. This is default serial port of i-boot, x-boot, Trusted Firmware-A (TF-A), U-Boot and Linux kernel. The default baud rate is 115,200. No parity and 1 stop-bit. |
21 | Master | Pin-headers (3x1, 100mill) of GPIO of Master C3V-W. |
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For Slave C3V-W, please run make xconfig at project top directory. Refer to picture below, when menu pops up, move cursor to “CPIO Mode” and select Slave.
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6. Boot Flow of Software
As normal C3V-W system, Master C3V-W runs i-boot, x-boot, TF-A, OP-TEE, U-Boot, and then Linux while Slave C3V-W stops running after it completes DRAM initialization. Master C3V-W can access any devices including DRAM in Slave C3V-W subsystem.
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