The aim of this document is to explain how to setup pins of SP7350 in device-tree source. SP7350 has 106 general purpose IO (GPIO) pins which are multiplexed with other special functions, like eMMC device, SPI-NOR flash, SPI-NAND flash, Ethernet PHY (RGMII or RMII interface), UART, I2C pins, and etc.
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GPIO # | Power domain | Type | Pin name | Power-supply |
0 - 19 | Main | 1.8V GPIO | G_MX0 - G_MX19 | VDDPST18_GPIO |
20 | 1.8V/3.0V DVIO | G_MX20 | VDDPST3018_DVIO_2 | |
21 - 27 | G_MX21 - G_MX27 | VDDPST3018_DVIO_1 | ||
28 - 37 | G_MX28 - G_MX37 | VDDPST3018_DVIO_2 | ||
38 - 43 | G_MX38 - G_MX43 | AVDDIO_3018_SD | ||
44 - 49 | G_MX44 - G_MX49 | AVDDIO_3018_SDIO | ||
50 - 59 | CM4 (AO) | AO_MX0 - AO_MX9 | VDDPST3018_DVIO_AO_1 | |
60 - 69 | AO_MX10 - AO_MX19 | VDDPST3018_DVIO_AO_2 | ||
70 - 79 | AO_MX20 - AO_MX29 | VDDPST3018_DVIO_AO_3 | ||
80 - 98 | 1.8V GPIO | AO_MX30 - AO_MX48 | VDDPST18_GPIO_AO | |
99 - 105 | IV_MX0 - IV_MX6 |
Voltage Mode Select
Beyond configuring the 1.8V or 3.0V power to supply pins of a DVIO group in circuit boards (hardware), setting up the voltage mode select (ms control) control-bits is crucial for the normal operation of IO pins. The following properties configure voltage mode select control-bits in the Device Tree Source (DTS) file:
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SP7350 has 106 general purpose IO (GPIO) pins. Most of them are multiplexed with other special function pins. This section explains how to modify device-tree source file to set up GPIO pins as digital input or output pins.
Define GPIO in device-tree source file
Every single device has a node in device-tree source (dts) file in Linux. Property pinctrl-0 (or pinctrl-1, pinctrl-2,… if a device has more states) is used to point at pin configuration node within pin controller (node pinctrl@f8800080 in SP7350). Pin configuration nodes (sub-nodes in node pinctrl@f8800080 ) define the actual pins assignment.
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typec_pins: pinmux_typec-pins { function = "GPIO"; pins = "GPIO98"; }; |
Setting GPIO Characteristics
GPIO pins' characteristics, such as setting them to high, low, or configuring additional features, can also be directly specified within the pin node. For instance, we extend the previous example to add GPIO0 and GPIO1 and configure them as input and output, respectively. We introduce the extra_gpio_pins node label after typec_pins:
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u3phy0: uphy@f80bd000 {
:
:
pinctrl-names = "default";
pinctrl-0 = <&typec_pins, &extra_gpio_pins>;
typec-gpios = <&pctl 98 GPIO_ACTIVE_HIGH>;
:
:
}; |
Add extra_gpio-pins node and label as shown below:
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typec_pins: pinmux_typec-pins {
function = "GPIO";
pins = "GPIO98";
};
extra_gpio_pins: extra_gpio-pins {
gpio0_pinconf {
function = "GPIO";
pins = "GPIO0";
input-enable;
input-schmitt-enable;
};
gpio1_pinconf {
function = "GPIO";
pins = "GPIO1";
output-enable;
output-low;
drive-strength-microamp = <SPPCTRL_GPIO_DRV_IOH_1100_IOL_1100UA>;
};
}; |
In the extra_gpio-pins node, GPIO0 is configured as an input with Schmitt trigger. Meanwhile, GPIO1 is configured as an output set to low, with a specified drive strength.
Special Function Pins
Some devices pins of SP7350 are multiplexed to specified pin-group of SP7350. This section explains how to modify device-tree source file to enable pins of those devices.
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