Disclaimer
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Channel | Data Lane # | Virtual Channel # | Remarks |
|---|---|---|---|
RX0 | 2 | 2 | Not available in this package |
RX1 | 2 | 2 | Not available in this package |
RX2 | 2 | 2 | |
RX3 | 2 | 2 | Not available for version A chips. |
RX4 | 2 | 2 | |
RX5 | 4 | 4 |
It's important to note that RX2 and RX3 share pins with the CPIO interface. Therefore, only one of RX2/RX3 or the CPIO interface can be active at any given time.
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Symbol | Parameters | Conditions | Min. | Typ. | Max. | Unit | ||
I08 | I1.10.8V supply current | Chip leakage is 182 mA @0.8V including: CA55 @1.8GHz, NPU @900MHz with 0.85V | 2675 | 4243 | mA | |||
I1.1 | 1.1V supply current | 280 | 285 | mA | ||||
I1.8 | 1.8V supply current | 42.5 | 424344.7 | 285mA | 44||||
I3. | 70 | 3.0V supply current | 65.5 | 67 | mA | |||
I3.3 | 3.3V supply current | 199.5 | 213.5 | mA | ||||
Power Dissipation | 3.38 | 4.69 | W |
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