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| Field Name | Bit | Access | Description |
| Reserved | 31:5 | RO | RESERVED |
| J FL FORCE FS | 4 | RW | 全名Enable Config device error state 0 : enable error state(default) |
| J FL DP PILLUP | 3 | RW | 全名Config device DP or MP resister pullup 0 : Full-low speed DP pull up(default) |
| J FL SAMPLE SEL | 2 | RW | 全名Enable Full-low speed rx linestat sample circuit 0 : disable Full-low speed rx linestat sample circuit |
| J DIS FSM WAIT4MS EN | 1 | RW | Disable HOSTDISC error state 0 : enable error state 1 : disable error state(default) |
| J FS ONLY | 0 | RW | Disable UPHY AFE Low speed circuit at Low speed 0 : Low speed circuit use in Low speed(default) 1 : Full speed circuit usb in Low speed |
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| Field Name | Bit | Access | Description |
| Reserved | 31:8 | RO | RESERVED |
Reserved | 7 | RW | RESERVED |
Reserved | 6 | RW | RESERVED |
NA | 5:0 | RW | NA |
J AC2 0 B | 5:3 | RW | OTG Discharge Current Option. 0x0: 5uA 0x1 : Default value其他值也要說明.: 10uA 0x2: 15uA 0x3: 20uA 0x4: 30uA (default) 0x5: 40uA 0x6: 50uA 0x7: 60uA |
J AC2 0 | 2:0 | RW | OTG Charge Current Option. 0x0: 5uA 0x1: Default value其他值也要說明.: 10uA 0x2: 15uA 0x3: 20uA 0x4: 30uA (default) 0x5: 40uA 0x6: 50uA 0x7: 60uA |
149.21 CONFIG21 (cfg21)
Address: 0x9C004AD4
Reset: 0x0000 0001
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Field Name | Bit | Access | Description |
Reserved | 31:8 | RO | RESERVED |
DCP2P7V | 7:4 | RW | Battery Charge DCP 2.7V control to APHYDetail Description DCP 1.2V mode dm source voltage trimming: triming step=25mV 0x0: 1.025V 0x3: 1.1V 0x7: 1.2V 0xb: 1.3V 0xe: 1.4V |
DCP1P2V | 3:0 | RW | Battery Charge DCP 1.2V control to APHYDetail Description DCP 2.7V mode dm source voltage trimming: triming step=25mV 0x0: 2.525V 0x3: 2.6V 0x7: 2.7V 0xb: 2.8V 0xe: 2.9V |
149.23 CONFIG23 (cfg23)
Address: 0x9C004ADC
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| Field Name | Bit | Access | Description |
Reserved | 31:8 | RO | RESERVED |
RFU | 7:6 | RW | Reserved for future use |
PROB | 5:3 | RW | APHY Probe controlDetail Description 0x0: 597.5mV 0x1: 617.5mV 0x2: 636.5mV 0x3: 656.5mV (default) 0x4: 675.5mV 0x5: 695.5mV 0x6: 714.5mV 0x7: 734.5mV |
R TEST TIEH | 2 | RW | R TEST Tie High control to APHY Detail Description0: disable (default) 1: USB_R_TEST=AVDDC33 |
EN DCP2P7V | 1 | RW | Enable 2.7V DCP modeDetail Description 0: disable 2.7V DCP mode (default) 1: enable 2.7V DCP mode |
EN DCP1P2V | 0 | RW | Enable 1.2V DCP modeDetail Description 0: disable 1.2V DCP mode (default) 1: enable 1.2V DCP mode |
149.24 CONFIG24 (cfg24)
Address: 0x9C004AE0
Reset: 0x0000 0001
| Field Name | Bit | Access | Description |
| Reserved | 31:8 | RO | RESERVED |
| BC AUTO RST | 7 | RW | Battery Charge auto re-start enable 1'b0: Disable auto re-start. 1'b1: Enable auto re-start(Default) |
| TBC AUTO RST | 6:0 | RW | Battery Charge auto re-start timerDetail Description (單位?) When counter equal to J_TBC_AUTO_RST, internal FSM timeout. Real time is 606ms*J_TBC_AUTO_RST |
149.25 CONFIG25 (cfg25)
Address: 0x9C004AE4
Reset: 0x0000 0004
| Field Name | Bit | Access | Description |
| Reserved | 31:8 | RO | RESERVED |
| RFU | 7:3 | RW | Reserved for future use |
| SQ CT | 2:0 | RW | RX Squelch level control to APHY Detail Description (單位?)0x0: 67.8mV 0x1: 84.5mV 0x2: 101.2mV 0x3: 118.1mV 0x4: 135.0mV (default) 0x5: 152.1mV 0x6: 169.2mV 0x7: 186.6mV |
USB Controller System 0 (USBC0)
Group 0 USB Host Control (UHC)
0.0 USB Host Version (UHVERSION)
Address: 0x9C102000
Reset: 0xC2120101
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