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- DPCU_DFI_CMD_DEC: This module is used to decode DFI commands from DRAM controller for DRAM device.
- DPCU_APHY_INIT: DPCU_APHY_INIT controls the initial flow for analog part (APHY).
- DPCU_DATA_TRAINING: This is the crucial part of DDRPHY, and it is used to do data training, which is the process to acquire optimal timing between signals for DRAM write/read transactions.
- DPCU_CMD_ISSUE: This module works like a lite DRAM controller. It can generate DRAM commands and the timing between those commands is guaranteed to meet DRAM specification.
- DPCU_VT_DETECT: Since process, voltage and temperature can deviate the delay of delay cells, this module is used to compensate those non-ideal effects.
- DPCU_SW_UPDATE: If the system need to change some settings of delay cells by software, this module can update those settings in a suitable period.
- DPCU_RGST_BUS: The communication interface between CPU and DDRPHY.
- DPCU_APHY_WRAPPER: The interface between DPCU and APHY.
- DDR_APHY: Analog part of DDRPHY which provide the interface with DDR device.
Note: There have critical timing between CPU and SDRAM, we don't prefer user to tune that. If you have special request in SDRAM support, please contact edwin.chiu@sunplus.com.