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Field Name | Bit | Access | Description |
Write Mask Bits | 31:16 | RW | Write Mask Bits Corresponding Mask Bits for Bit[15:0] Example: If user want to set bit0 = 1, than he should set bit16 to 1 (0x 0001) to enable bit0 functionality |
Reserve | 15:9 | RO | RESERVED |
icm1 clk sel | 8:6 | RW | Select clock source. (External CLK range 32K-210M Hz) 0: External CLK 0 1: External CLK 1 2: External CLK 2 3: External CLK 3 4: SYSCLK 5: 27 MHz 6: 32 KHz Others : 0 |
icm1 mux sel | 5:3 | RW | Select input signal source. 0: Input 0 1: Input 1 2: Input 2 3: Input 3 4: Test Signal Others: 0 |
icm1 int clr | 2 | W1C | Clear the interrupt. Write 1 to clear interrupt, HW will recover this bit to 0 automatically. |
Reserve | 1 | RW | RESERVED |
icm1 en | 0 | RW | ICM1 enable When set this bit to 0, it mean disabled input capture module 1 and the interrupt also cleared. |
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