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Memory Map Start Address | Data Width | Group No. | Module |
---|---|---|---|
0x9C003E80 | 32 | 125 | CARD1 |
0x9C003F00 | 32 | 126 | CARD1 |
0x9C003F80 | 32 | 127 | CARD1 |
0x9C004000 | 32 | 128 | CARD1 |
0x9C004080 | 32 | 129 | CARD1 |
0x9C008400 | 32 | 264 | CARD4 |
0x9C008480 | 32 | 265 | CARD4 |
0x9C008500 | 32 | 266 | CARD4 |
0x9C008580 | 32 | 267 | CARD4 |
0x9C008600 | 32 | 268 | CARD4 |
CARD1 and CARD4 registers have the same offset in corresponding register group. Only CARD1 registers are described in following register description, for CARD4 please refer to CARD1 description for more detail.
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Field Name | Bit | Access | Description |
Reserved | 31:16 | RO | |
Reserved | 15:11 | RO | |
dmadst | 10:8 | RW | DMA Destination Selection others: reserved (dmadst 跟 dmasrc 不是一組就好了嗎 ? 互斥的設定) |
Reserved | 7 | RO | |
dmasrc | 6:4 | RW | DMA Source Selection others: reserved |
Reserved | 3 | RO | |
MediaType | 2:0 | RW | The Storage Media Type Selection others : reserved |
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Field Name | Bit | Access | Description |
Reserved | 31:16 | RO | |
CARD CTL PAGE CNT | 15:0 | RO | Page Number that CARD CTL is Reading/Writing Currently |
118.2 Length of SDRAM Sector 0 (sdram sector 0 size)
Address: 0x9C003B08
Reset: 0x0000 FFFF
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Field Name | Bit | Access | Description |
Reserved | 31:0 | RO |
RGST Table Group 264 CARD4 (Base Address: 0x9C008400, Please refer to CARD1 register offset and description for more detail)
RGST Table Group 265 CARD4 (Base Address: 0x9C008480, Please refer to CARD1 register offset and description for more detail)
RGST Table Group 266 CARD4 (Base Address: 0x9C008500, Please refer to CARD1 register offset and description for more detail)
RGST Table Group 267 CARD4 (Base Address: 0x9C008580, Please refer to CARD1 register offset and description for more detail)
RGST Table Group 268 CARD4 (Base Address: 0x9C008600, Please refer to CARD1 register offset and description for more detail)