本章以凌阳科技具有自主知识产权的Plus1 7021芯片作为SOC系统实践平台，,并将上一章的数码管显示 IP整合到如下图的SOC系统中来；因需要搭配FPGA子板和测试扩展板，所以平台连接如下图所示：
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对应的板级连接参考原理图如下
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使用时注意：
SP7021主板上的3个50 PIN插座U20B/U20A/J17 用于扩展FPGA子板；
1：主板上的U20A接FPGA子板的J1(Pin脚以一对应，如 This chapter uses the Plus1 SP7021 chip with independent intellectual property rights of Sunplus Technology as the SOC system practice platform, and integrates the digital tube display IP of the previous chapter into the SOC system; due to the need to match the FPGA daughter board and test expansion board , So the platform connection is shown below:
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The corresponding board-level connection reference schematic is as follows
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Note when using:
Three 50 PIN sockets U20B/U20A/J17 on the SP7021 motherboard are used to expand the FPGA daughter board;
1: U20A on the motherboard is connected to J1 of the FPGA daughter board (Pin pins correspond to one, such as 1-1 ...)，经由J17将FPGA 的42 , and the 42 pin IO of FPGA (Bank 35 with 3.3V 电平) 扩展出来，供用户使用2：主板上的U20B接FPGA子板的J2(Pin脚以一对应，如 level) is extended through J17 for users use
2: U20B on the motherboard is connected to J2 of the FPGA daughter board (Pin pins correspond to one, such as 1-51 ...), 提供主板上的Plus1 7021主芯片与FPGA的数据传输通道SOC 系统的实现分成系统硬件平台的实现和系统软件平台实现两大部分，后续章节分别介绍providing the data transmission channel between the Plus1 7021 main chip on the motherboard and the FPGA
The realization of the SOC system is divided into two parts: the realization of the system hardware platform and the realization of the system software platform and will be introduced in subsequent sections.