Operation mode configure time after AO33V and VDD33 power ready (include internal core power ramp up time and reset circuit time cost)
9.2. Power Down Sequence
Figure 9-2 Power Down Sequence
9.3. Reset State
There are 3 physically event to trigger chip reset.
1. POR (Power On Reset)
2. External Reset
3. LVD (Low Voltage Detection)
The POR has 2 functions when AVDD33/DVDD12 becomes larger than the trip level. The first function is to give a reset pulse and the second function is to give a constant signal that tells whether the supply is on or off.
To have a better understanding of the functionality of the POR, see Figure 7. In this figure, a possible curve of AVDD33/DVDD12 is given with a dip at T3-T5 and a dip at T6-T7. At T0 the POR, porpulse, will start off with a '1' (= Voh). At T1 the detector passes through the triplevel, porconst becomes '1' after Thigh. A delay element will add an- other Tpulse before porpulse drops to '0'. This is done to make sure that the length of the generated detector pulse, porpulse, is large enough to reset asynchronous flip-flops. If the dip is too short (T7-T6 < Tlow) porpulse will not react and will stay low.
AVDD33/DVDD12 < Vtrip
AVDD33/DVDD12 > Vtrip
Figure9-3 POR Timing
difference between high and low trip- level
time vdd_por has to be above
Vtrip_high before porconst will be ‘1’
time vdd_por has to be below
Vtrip_low before porconst will be ‘0’
time porpulse will be ‘1’ after
vdd_por > Vtrip_high
The external reset is ACTIVE LOW meaning that asserting external reset LOW, will cause the entire system to reset. If the external reset signal rises through VT+ and keeps HIGH time longer than TRSTH, then the internal reset signal de-asserts. If external reset signal falls through VT-, and keeps LOW time longer TRSTL, then internal reset signal asserts.
Figure9-4 External Reset Timing
Low to High Threshold Point
High to Low Threshold Point
Reset keep High Time
Reset keep Low Time
When 1.5V/ 1.2V/ 0.9V voltage is lower than the setting reference voltage, reset signal will be assert to reset the whole chip.