{"type":"doc","content":[{"type":"paragraph","content":[{"text":"An I/O processor (8051) is designed for processing I/O events, like receiving IR signal from remote controller, taking care of power on or off requests from RTC, or other hardware events of external peripherals even when power of main system is off. The goal of the document is to illustrate how to enable, program and use I/O processor (8051). Please follow the following steps to setup and use I/O processor in SP7021.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"1. Enable Sunplus I/O processor (IOP) driver","type":"text"}]},{"type":"paragraph","content":[{"text":"Run ","type":"text"},{"text":"make kconfig","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in project top directory. After Linux Kernel Configuration menu pops up, please use arrow keys to move cursor to go to sub menu “Device Drivers”, then go to its sub menu “Misc devices”, and then go to next sub menu “IOP support”. Enable “Sunplus IOP support”. Refer to screenshot of sub menu “IOP support” below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":480,"id":"52258cdf-a3af-4cbf-b7f2-7ced48c513bc","collection":"contentId-610172933","type":"file","height":269}}]},{"type":"paragraph","content":[{"text":"where “Sunplus IOP support” is enabled to support I/O processor of Sunplus SP7021.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"2. Modify device-tree source file to reserve memory for I/O processor.","type":"text"}]},{"type":"paragraph","content":[{"text":"Add subnode ","type":"text"},{"text":"iop_device","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in node ","type":"text"},{"text":"reserved-memory","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file, ","type":"text"},{"text":"linux/kernel/arch/arm/boot/dts/sp7021-common.dtsi","type":"text","marks":[{"type":"em"}]},{"text":", to reserve memory for I/O processor as shown below:","type":"text"}]},{"type":"codeBlock","content":[{"text":"\treserved-memory {\n\t\t#address-cells = <1>;\n\t\t#size-cells = <1>;\n\t\tranges;\n\n\t\tiop_reserve: iop_device {\n\t\t\tno-map;\n\t\t\treg = <0x00100000 0x100000>;\n\t\t};\n\t};","type":"text"}]},{"type":"paragraph","content":[{"text":"where property ","type":"text"},{"text":"reg","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" defines base-address and size of memory of I/O processor. It starts from ","type":"text"},{"text":"0x00100000","type":"text","marks":[{"type":"em"}]},{"text":" and its size is ","type":"text"},{"text":"0x000100000","type":"text","marks":[{"type":"em"}]},{"text":" (1 MiB).","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"3. Modify device-tree source file to add a node for of I/O processor driver.","type":"text"}]},{"type":"paragraph","content":[{"text":"Add subnode ","type":"text"},{"text":"iop@9c000400","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in node ","type":"text"},{"text":"soc@B","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source, ","type":"text"},{"text":"linux/kernel/arch/arm/boot/dts/sp7021-common.dtsi","type":"text","marks":[{"type":"em"}]},{"text":", as shown below:","type":"text"}]},{"type":"codeBlock","content":[{"text":"\t\tiop: iop@9c000400 {\n\t\t\tcompatible = \"sunplus,sp7021-iop\";\n\t\t\treg = <0x9c000400 0x80>, <0x9c000000 0x80>, <0x9c000F00 0x80>, <0x9c003100 0x80>, <0x9c012B80 0x80>;\n\t\t\treg-names = \"iop\", \"iop_moon0\", \"iop_qctl\", \"iop_pmc\", \"axi_mon\";\n\t\t\tinterrupt-parent = <&intc>;\n\t\t\tinterrupts = <41 IRQ_TYPE_LEVEL_HIGH>, <42 IRQ_TYPE_LEVEL_HIGH>;\n\t\t\tmemory-region = <&iop_reserve>;\n\t\t\tpinctrl-names = \"default\";\n\t\t\tpinctrl-0 = <&pins_iop>;\n\t\t};","type":"text"}]},{"type":"paragraph","content":[{"text":"The compatible string should be “sunplus,sp7021-iop”. Two high-level trigger interrupts, number 41 and 42, are defined here. IOP can send interrupt request to main CPU either by using number 41 or number 42 interrupt. Property ","type":"text"},{"text":"memory-region","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" should be a handle to memory area defined in node reserved-memory.","type":"text"}]},{"type":"paragraph","content":[{"text":"Add subnode ","type":"text"},{"text":"pinmux_iop-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source, ","type":"text"},{"text":"linux/kernel/arch/arm/boot/dts/sp7021-common.dtsi","type":"text","marks":[{"type":"em"}]},{"text":", as shown below:","type":"text"}]},{"type":"codeBlock","content":[{"text":"\t\tpctl: pinctl@9c000100 {\n\t\t\tcompatible = \"sunplus,sp7021-pctl\";\n\t\t\t :\n\t\t\t :\n\t\t\tpins_iop: pinmux_iop-pins {\n\t\t\t\tsunplus,pins = <\n\t\t\t\t\tSPPCTL_IOPAD(17, SPPCTL_PCTL_G_IOPP, 0, 0)\n\t\t\t\t\tSPPCTL_IOPAD(18, SPPCTL_PCTL_G_IOPP, 0, 0)\n\t\t\t\t>;\n\t\t\t}\n\t\t\t :\n\t\t\t :\n\t\t}","type":"text"}]},{"type":"paragraph","content":[{"text":"where ","type":"text"},{"text":"pinmux_iop-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" is sub node of node ","type":"text"},{"text":"pinctl@9c000100","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Two pins G_MX17 (GPIO_P2_1) and G_MX18 (GPIO_P2_2) are set as pins of I/O processor. Note that the two pins can only be access in normal operation mode because that power of normal GPIO pins (G_MX0/P0_0 ~ G_MX87/P10_7) is turned off during standby mode. In standby mode, only IV_MX0 ~ IV_MX6 can be accessed. No need to set pins in device-tree for standby mode operation.","type":"text"}]},{"type":"paragraph","content":[{"text":"Please note that to comply with Linux rules, after version 5.10.59, 4 property-names of pin node of SP7021 are changed as shown in table below:","type":"text","marks":[{"type":"textColor","attrs":{"color":"#ff5630"}}]}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"fb2d519e-a03f-4ece-aea4-6d4afb49438f"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"5.4.35","type":"text"}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"5.10.59","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sppctl,function","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"function","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sppctl,groups","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"groups","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sppctl,pins","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sunplus,pins","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sppctl,zero_func","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[340.0]},"content":[{"type":"paragraph","content":[{"text":"sunplus,zerofunc","type":"text"}]}]}]}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"4. Install C compiler or assembler for I/O processor","type":"text"}]},{"type":"paragraph","content":[{"text":"I/O processor of SP7021 is a low power, turbo mode 8051. Please install 8051 C compiler or assembler. Recommend to use Keil C51 C compiler or SDCC (released under a ","type":"text"},{"text":"GPL","type":"text","marks":[{"type":"em"}]},{"text":" license). ","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"5. Write C or assembly source files for IOP","type":"text"}]},{"type":"paragraph","content":[{"text":"Use a text editor to write your C or assembly source files. There are two types of code of IOP you need to write. One is for normal mode and the other is for standby mode. Either type of code will be loaded into the DRAM defined in reserved memory area in device-tree source file according to operating mode of IOP. After finish writing source codes, please use C compiler or assembler to compile your source files into binary image code. Refer to attached source files for normal and standby operation of IOP, respectively:","type":"text"}]},{"type":"paragraph"},{"type":"mediaGroup","content":[{"type":"media","attrs":{"id":"995ee6d0-5fc3-440d-a61d-8ca5198e2245","collection":"contentId-610172933","type":"file"}},{"type":"media","attrs":{"id":"db1a8d1d-14f6-4d38-9722-d866982a4bf4","collection":"contentId-610172933","type":"file"}}]},{"type":"paragraph","content":[{"text":"Note that in standby mode, power of DRAM is off. So, before switching IOP to standby mode, standby mode code of IOP is ‘copied’ into 16k I-cache. IOP fetches code from I-cache in standby mode. This means that code-size of standby mode code is limited to no more than size of I-cache (which is 16 KiB). The code size of normal mode code has no limit. It can be as large as 8051 program addressing space, 64 KiB.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"6. Convert binary image files to “C” const char array","type":"text"}]},{"type":"paragraph","content":[{"text":"After compiling sources and linking objectives to binary, you need further to convert them to C char array. And then copy them to char array “","type":"text"},{"text":"const unsigned char IopNormalCode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"” and “","type":"text"},{"text":"const unsigned char IopStandbyCode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"“ in C file: “","type":"text"},{"text":"drivers/misc/iop/iopnormal.c","type":"text","marks":[{"type":"em"}]},{"text":"” and “drivers/misc/iop/iopstandby.c”, respectively. Refer to screenshot of file ","type":"text"},{"text":"iopnormal.c","type":"text","marks":[{"type":"em"}]},{"text":":","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":598,"id":"d47a093c-3b15-425f-ab34-a5a83a928fd5","collection":"contentId-610172933","type":"file","height":334}}]},{"type":"paragraph","content":[{"text":"During Sunplus IOP driver mounting, the codes in char array ","type":"text"},{"text":"IopNormalCode","type":"text","marks":[{"type":"em"}]},{"text":" and ","type":"text"},{"text":"IopStandbyCode","type":"text","marks":[{"type":"em"}]},{"text":" will be loaded into DRAM reserved area for IOP. After driver finishes loading code, it will start IOP on normal mode.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"7. Build Linux image","type":"text"}]},{"type":"paragraph","content":[{"text":"Go to top folder. Run ","type":"text"},{"text":"make all","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to build Linux image.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"8. Boot Linux","type":"text"}]},{"type":"paragraph","content":[{"text":"Boot Linux with the built image.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"9. Use system-file (sysfs) to communicate with IOP driver","type":"text"}]},{"type":"paragraph","content":[{"text":"Sunplus IOP driver supports to update code (firmware) of IOP using Linux system-file (sysfs). For example, you can update 'normal' code of IOP by writing a binary file of IOP to sysfs, ","type":"text"},{"text":"normalcode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":574,"id":"a1756501-0021-4e18-a010-04f08cbbf7a4","collection":"contentId-610172933","type":"file","height":70}}]},{"type":"paragraph","content":[{"text":"64 KiB firmware, ","type":"text"},{"text":"test.bin","type":"text","marks":[{"type":"em"}]},{"text":", is written to IOP for normal mode operation.","type":"text"}]},{"type":"paragraph","content":[{"text":"Update ‘standby’ code of IOP by writing new binary file of IOP to sysfs, ","type":"text"},{"text":"standbycode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":582,"id":"61697302-602c-49c2-b9a8-3670bd8f819f","collection":"contentId-610172933","type":"file","height":72}}]},{"type":"paragraph","content":[{"text":"16 KiB firmware, ","type":"text"},{"text":"test2.bin","type":"text","marks":[{"type":"em"}]},{"text":", is written to IOP for standby mode operation.","type":"text"}]},{"type":"paragraph","content":[{"text":"Code (firmware) of IOP can be read back also. Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":582,"id":"40e7f7ed-6383-4732-828b-7187611817fd","collection":"contentId-610172933","type":"file","height":179}}]},{"type":"paragraph","content":[{"text":"Operation mode of IOP can be switched by writing sysfs, ","type":"text"},{"text":"mode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":471,"id":"457bf644-1e0f-429a-bf1d-5778438c2de7","collection":"contentId-610172933","type":"file","height":29}}]},{"type":"paragraph","content":[{"text":"Operation mode of IOP is switched to standby mode by writing “1” to sysfs, ","type":"text"},{"text":"mode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":471,"id":"b376b944-9988-4f71-80ec-07f19f544e6d","collection":"contentId-610172933","type":"file","height":29}}]},{"type":"paragraph","content":[{"text":"Operation mode of IOP is switched to normal mode by writing “0” to sysfs, ","type":"text"},{"text":"mode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"Current operation mode of IOP can be read out by reading sysfs, ","type":"text"},{"text":"mode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":471,"id":"a7dbac1e-0821-4d4b-bf67-2463ca0f2db3","collection":"contentId-610172933","type":"file","height":30}}]},{"type":"paragraph","content":[{"text":"or","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":471,"id":"2aa3009b-d65d-4460-bdee-27f76cd635c6","collection":"contentId-610172933","type":"file","height":29}}]},{"type":"paragraph","content":[{"text":"WAKE_IN pin can be enabled by writing 1 to sysfs, ","type":"text"},{"text":"wakein","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":485,"id":"b77389b5-2ff4-4663-a358-677a28a88189","collection":"contentId-610172933","type":"file","height":45}}]},{"type":"paragraph","content":[{"text":"Since WAKE_IN pin is enabled, pulling WAKE_IN pin to LOW will wake up system when it is in standby mode.","type":"text"}]},{"type":"paragraph","content":[{"text":"Normally, when you run ","type":"text"},{"text":"poweroff","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" command in Linux shell, system will enter S3. If you want to enter S1 instead, you can read sysfs, ","type":"text"},{"text":"S1mode","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":". Refer to screenshot below:","type":"text"}]},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":445,"id":"f7578039-0397-4552-93ad-2e7342eb6a5d","collection":"contentId-610172933","type":"file","height":74}}]},{"type":"paragraph","content":[{"text":"System entered S1 mode.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"10. Supplementary","type":"text"}]},{"type":"paragraph","content":[{"text":"Refer to diagram below, SP7021 has three power states: S0, S1 and S3. After power-on reset, SP7021 will enter S0 in which all modules of SP7021 are powered. This is a state of full power and function. All GPIO pins (GPIO0 ~ GPIO98) of IOP can be set up and mapped to G_MX0 ~ G_MX91 and IV_MX0 ~ IV_MX6 pins of SP7021.","type":"text"}]},{"type":"paragraph"},{"type":"mediaSingle","attrs":{"layout":"center"},"content":[{"type":"media","attrs":{"width":590,"id":"681bb278-db49-4d98-8308-2a78b0a38917","collection":"contentId-610172933","type":"file","height":268}}]},{"type":"paragraph","content":[{"text":"In S1 (low power mode), IOP, SRAM (for storing program code of IOP), IV_MX0~IV_MX6 pins are powered. IOP runs ‘standby mode’ code stored in SRAM. Only IV_MX0 ~ IV_MX6 pins can be accessed by IOP via GPIO0 ~ GPIO6. Standby mode code is designed to detected some wake-up events, like power-on key signal from remote controller, special pattern of UART signal and etc. Once wake-up event is detected, IOP sets register to power on whole system (switch back to S0). The power consumption is about 3 mW in this mode.","type":"text"}]},{"type":"paragraph","content":[{"text":"Refer to mapping table of GPIO to IV_MX pins:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"d09eb2a3-df33-4f9e-a561-2f6ffb58ee68"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"AO domain pins","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"S0 mode","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"S1 mode","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[0]","type":"text"}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[92]","type":"text"}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[0]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[1]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[93]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[1]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[3]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[94]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[3]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[4]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[95]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[4]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[5]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[96]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[5]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[6]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[97]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[6]","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[251.0]},"content":[{"type":"paragraph","content":[{"text":"IV_MX[","type":"text"},{"text":"2","type":"text","marks":[{"type":"textColor","attrs":{"color":"#6554c0"}}]},{"text":"]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[263.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[98]","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[245.0]},"content":[{"type":"paragraph","content":[{"text":"GPIO[2]","type":"text"}]}]}]}]},{"type":"paragraph","content":[{"text":"In S3 (ultra low power mode), only SRAM and Wake-up circuitry are powered. This is the minimum power-consumption state. In this state, IOP is powered off, but ‘standby mode’ code of IOP is preserved in SRAM. Wake-up circuitry will detect the state of WAKE_IN (IV_MX1) pin continuously. A LOW state in WAKE_IN pin will switch power state of SP7021 to S0. The power consumption is about 1.8 mW in this mode.","type":"text"}]},{"type":"paragraph"},{"type":"paragraph","content":[{"text":"Refer to ","type":"text"},{"type":"inlineCard","attrs":{"url":"https://sunplus.atlassian.net/wiki/spaces/doc/pages/466190338"}},{"text":" for register descriptions.","type":"text"}]},{"type":"paragraph"}],"version":1}

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