{"type":"doc","content":[{"type":"paragraph","content":[{"text":"The aim of this document is to explain how to setup pins of SP7350 in device-tree source. SP7350 has 106 general purpose IO (GPIO) pins which are multiplexed with other special functions, like eMMC device, SPI-NOR flash, SPI-NAND flash, Ethernet PHY (RGMII or RMII interface), UART, I2C pins, and etc. ","type":"text"}]},{"type":"paragraph","content":[{"text":"The following sections will explain how to setup GPIOs and special function pins in device-tree source file. Note that the same device-tree source file is used by U-Boot and Linux in SP7350. Both Pinctrl drivers support ","type":"text"},{"text":"generic helper bindings","type":"text","marks":[{"type":"em"}]},{"text":". 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These pins are referred to as DVIO pins in the subsequent sections.","type":"text"}]}]}]},{"type":"paragraph","content":[{"text":"Refer to table below for a breakdown of power domain, supplying voltage, pin name (hardware pin name), supplying power pins of all IO pins of SP7350:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":774.0,"localId":"a5f8fb8e-33b2-4f01-8f4b-f0327098aa4a"},"content":[{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"background":"#cef5f7","rowspan":1,"colwidth":[86.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"GPIO #","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"background":"#b3f5ff","rowspan":1,"colwidth":[138.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"Power domain","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"background":"#cef5f7","rowspan":1,"colwidth":[141.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"Type","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"background":"#cef5f7","rowspan":1,"colwidth":[184.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"Pin name","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"background":"#b3f5ff","rowspan":1,"colwidth":[225.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"Power-supply","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1,"colwidth":[86.0]},"content":[{"type":"paragraph","marks":[{"type":"alignment","attrs":{"align":"center"}}],"content":[{"text":"0 - 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IV_MX6","type":"text"}]}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"Voltage Mode Select","type":"text"}]},{"type":"paragraph","content":[{"text":"Beyond configuring the 1.8V or 3.0V power to supply pins of a DVIO group in circuit boards (hardware), setting up the voltage mode select (ms control) control-bits is crucial for the normal operation of IO pins.","type":"text","marks":[{"type":"textColor","attrs":{"color":"#ffc400"}}]},{"text":" The following properties configure voltage mode select control-bits in the Device Tree Source (DTS) file:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"35026590-8c9a-4a37-9c1a-b5501e8268f3"},"content":[{"type":"tableRow","content":[{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"Properties","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"Pins","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableHeader","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"Value","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sunplus,ms-dvio-group-0","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"G_MX21~G_MX27","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"“3V0“","type":"text","marks":[{"type":"strong"}]},{"text":" for 3.0V; ","type":"text"},{"text":"“1V8“","type":"text","marks":[{"type":"strong"}]},{"text":" for 1.8V.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sunplus,ms-dvio-group-1","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"G_MX20, G_MX28~G_MX37","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"“3V0“","type":"text","marks":[{"type":"strong"}]},{"text":" for 3.0V; ","type":"text"},{"text":"“1V8“","type":"text","marks":[{"type":"strong"}]},{"text":" for 1.8V.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sunplus,ms-dvio-ao-group-0","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"AO_MX0~AO_MX9","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"“3V0“","type":"text","marks":[{"type":"strong"}]},{"text":" for 3.0V; ","type":"text"},{"text":"“1V8“","type":"text","marks":[{"type":"strong"}]},{"text":" for 1.8V.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sunplus,ms-dvio-ao-group-1","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"AO_MX10~AO_MX19","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"“3V0“","type":"text","marks":[{"type":"strong"}]},{"text":" for 3.0V; ","type":"text"},{"text":"“1V8“","type":"text","marks":[{"type":"strong"}]},{"text":" for 1.8V.","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sunplus,ms-dvio-ao-group-2","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"AO_MX20~AO_MX29","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"“3V0“","type":"text","marks":[{"type":"strong"}]},{"text":" for 3.0V; ","type":"text"},{"text":"“1V8“","type":"text","marks":[{"type":"strong"}]},{"text":" for 1.8V.","type":"text"}]}]}]}]},{"type":"paragraph","content":[{"text":"These properties should be set in the pinctrl node in the DTS file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pctl: pinctrl@f8800080 {\n\t\t:\n\t\t:\n\t\tsunplus,ms-dvio-group-0 = “1V8“;\n\t\tsunplus,ms-dvio-group-1 = “3V0“;\n\t\tsunplus,ms-dvio-ao-group-2 = “1V8“;\n\t\t:\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"Default voltage is “3V0”.","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"Pin Multiplexing Nodes","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"function","type":"text","marks":[{"type":"strong"}]},{"text":" - the multiplex function to select.","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"groups","type":"text","marks":[{"type":"strong"}]},{"text":" - the list of groups to select with this function. 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configure an input pin to run in Schmitt-trigger mode.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n input-schmitt-enable;\n :\n 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pin as output and drive high level on the line.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n output-high;\n :\n :\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":14},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"output-low","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"description","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"This will configure the pin as output and drive low level on the line.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is 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High level as 0, Low level as 1.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n sunplus,input-invert-enable;\n :\n :\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":16},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"sunplus,output-invert-enable","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"description","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"This will invert the pin's output value. 1 as low level, 0 as high level.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n sunplus,output-invert-enable;\n :\n :\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":17},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"sunplus,input-invert-disable","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"description","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"This will normalize the pin's input value. High level as 1, Low level as 0.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n sunplus,input-invert-disable;\n :\n :\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":18},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"sunplus,output-invert-disable","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"description","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"This will normalize the pin's output value. 1 as high level, 0 as low level.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n sunplus,output-invert-disable;\n :\n :\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":19},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"sunplus,bias-strong-pull-up","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"description","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The pin will be pulled up strongly.","type":"text"}]},{"type":"panel","attrs":{"panelType":"warning"},"content":[{"type":"paragraph","content":[{"text":"For GPIO only, excluding DVIO.","type":"text"}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"argument","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"The argument is ignored.","type":"text"}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"usage","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"pinconf_example {\n\t:\n :\n sunplus,bias-strong-pull-up;\n :\n :\n};","type":"text"}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"DTS Files","type":"text"}]},{"type":"paragraph","content":[{"text":"Device-tree source files of SP7350 are located in ","type":"text"},{"text":"linux/kernel/arch/arm64/boot/dts/sunplus/","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"Here lists all files for SP7350 boards:","type":"text"}]},{"type":"table","attrs":{"layout":"default","width":760.0,"localId":"d3ab59f8-a1bf-46a8-b31d-c51273511004"},"content":[{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"background":"#81dfe4","rowspan":1},"content":[{"type":"paragraph","content":[{"text":"Boards","type":"text","marks":[{"type":"strong"}]}]}]},{"type":"tableCell","attrs":{"colspan":1,"background":"#81dfe4","rowspan":1},"content":[{"type":"paragraph","content":[{"text":"Device-tree source files","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"C3V-W Evaluation Board","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sp7350-ev.dts","type":"text"}]}]}]},{"type":"tableRow","content":[{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"C3V-W Demo Board","type":"text"}]}]},{"type":"tableCell","attrs":{"colspan":1,"rowspan":1},"content":[{"type":"paragraph","content":[{"text":"sp7350-dm.dts","type":"text"}]}]}]}]},{"type":"heading","attrs":{"level":1},"content":[{"text":"Example","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"Voltage Mode Select","type":"text"}]},{"type":"paragraph","content":[{"text":"For 1.8V/3.0V Dual Voltage IO (DVIO) pins, we need to select their voltage in pinctrl top node in DTS file. For example,","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plaintext"},"content":[{"text":"pctl: pinctrl@f8800080 {\n compatible = \"sunplus,sp7350-pctl\";\n :\n :\n sunplus,ms-dvio-group-0 = \"1V8\";\n sunplus,ms-dvio-group-1 = \"1V8\";\n sunplus,ms-dvio-ao-group-0 = \"1V8\";\n sunplus,ms-dvio-ao-group-1 = \"3V0\";\n sunplus,ms-dvio-ao-group-2 = \"3V0\";\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"In this example, DVIO groups 0 and 1 are configured to operate at 1.8V, while DVIO AO group 0 is designated with a voltage setting of 1.8V. Conversely, DVIO AO groups 1 and 2 are specifically set to operate at 3.0V. It is crucial to note that in the absence of a specified selection, the default voltage for these groups is set to 3.0V. ","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"GPIO","type":"text"}]},{"type":"paragraph","content":[{"text":"SP7350 has 106 general purpose IO (GPIO) pins. Most of them are multiplexed with other special function pins. This section explains how to modify device-tree source file to set up GPIO pins as digital input or output pins.","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"Define GPIO in device-tree source file","type":"text","marks":[{"type":"strong"}]}]},{"type":"paragraph","content":[{"text":"Every single device has a node in device-tree source (dts) file in Linux. Property ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" (or ","type":"text"},{"text":"pinctrl-1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":", ","type":"text"},{"text":"pinctrl-2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":",… if a device has more states) is used to point at pin configuration node within pin controller (node ","type":"text"},{"text":"pinctrl@f8800080 ","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"in SP7350). Pin configuration nodes (sub-nodes in node ","type":"text"},{"text":"pinctrl@f8800080 ","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":") define the actual pins assignment.","type":"text"}]},{"type":"paragraph","content":[{"text":"Users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to a node (device) in device-tree source file to set up GPIOs as digital input or output pins for a device . For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"u3phy0: uphy@f80bd000 {\n :\n :\n pinctrl-names = \"default\";\n pinctrl-0 = <&typec_pins>;\n typec-gpios = <&pctl 98 GPIO_ACTIVE_HIGH>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"where property ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" sets up pins of ","type":"text"},{"text":"uphy@f80bd000","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" device for ","type":"text"},{"text":"\"default\"","type":"text","marks":[{"type":"strong"}]},{"text":" state. It is a handle (an address) to sub-node of pin-controller node.","type":"text"}]},{"type":"paragraph","content":[{"text":"Property ","type":"text"},{"text":"typec-gpios","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" defines one GPIO pin to ","type":"text"},{"text":"GPIO98","type":"text","marks":[{"type":"strong"}]},{"text":" of pin controller. Linux driver can get GPIO descriptors using the property. ","type":"text"},{"text":"pctl","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" is a handle (an address) to pin controller.","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definitions of sub-node ","type":"text"},{"text":"pinmux_typec-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"typec_pins: pinmux_typec-pins {\n function = \"GPIO\";\n pins = \"GPIO98\";\n};","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"Setting GPIO Characteristics","type":"text","marks":[{"type":"strong"}]}]},{"type":"paragraph","content":[{"text":"GPIO pins' characteristics, such as setting them to high, low, or configuring additional features, can also be directly specified within the pin node. For instance, we extend the previous example to add GPIO0 and GPIO1 and configure them as input and output, respectively. We introduce the ","type":"text"},{"text":"extra_gpio_pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" node label after ","type":"text"},{"text":"typec_pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":":","type":"text"}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"u3phy0: uphy@f80bd000 {\n :\n :\n pinctrl-names = \"default\";\n pinctrl-0 = <&typec_pins &extra_gpio_pins>;\n typec-gpios = <&pctl 98 GPIO_ACTIVE_HIGH>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"Add ","type":"text"},{"text":"extra_gpio-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" node and label as shown below:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"c"},"content":[{"text":"typec_pins: pinmux_typec-pins {\n function = \"GPIO\";\n pins = \"GPIO98\";\n};\n\nextra_gpio_pins: extra_gpio-pins {\n gpio0_pinconf {\n function = \"GPIO\";\n pins = \"GPIO0\";\n input-enable;\n input-schmitt-enable;\n };\n\n gpio1_pinconf {\n function = \"GPIO\";\n pins = \"GPIO1\";\n output-enable;\n output-low;\n drive-strength-microamp = ;\n };\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"In the ","type":"text"},{"text":"extra_gpio-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" node, GPIO0 is configured as an input with Schmitt trigger. Meanwhile, GPIO1 is configured as an output set to low, with a specified drive strength.","type":"text"}]},{"type":"heading","attrs":{"level":2},"content":[{"text":"Special Function Pins","type":"text"}]},{"type":"paragraph","content":[{"text":"Some devices pins of SP7350 are multiplexed to specified pin-group of SP7350. This section explains how to modify device-tree source file to enable pins of those devices.","type":"text"}]},{"type":"paragraph","content":[{"text":"Every device should have a node in device-tree source (dts) file in Linux. Property ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" (or ","type":"text"},{"text":"pinctrl-1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":", ","type":"text"},{"text":"pinctrl-2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":",… if a device has more states) is used to point at pin configuration node within pin controller (node ","type":"text"},{"text":"pinctrl@f8800080 ","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"in SP7021). Pin configuration nodes (sub-nodes in node ","type":"text"},{"text":"pinctrl@f8800080 ","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":") define the actual pins assignment. For examples:","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"pinmux","type":"text","marks":[{"type":"strong"}]}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"eMMC device:","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of eMMC of SP7350, ","type":"text"},{"text":"[D5, D3, D4, D0, D1, CLK, D2, D7, D6, CMD, DS]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[20, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up eMMC pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to eMMC node ","type":"text"},{"text":"mmc@f8003b00","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"mmc0: mmc@f8003b00 {\n :\n :\n pinctrl-names = \"default\";\n pinctrl-0 = <&emmc_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_emmc-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"emmc_pins: pinmux_emmc-pins {\n function = \"EMMC\";\n groups = \"EMMC\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"EMMC","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the only pin-group of eMMC which is mapped to GPIO [20, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":2},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"GMAC","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of GMAC of SP7350, ","type":"text"},{"text":"[RXC, RXDV, RXD0, RXD1, RXD2, RXD3, TXC, TXEN, TXD0, TXD1, TXD2, TXD3, MDC, MDIO]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[3, 4, 5, 6, 13, 14, 10, 11, 7, 8, 15, 16, 9, 12]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up GMAC pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to GMAC node ","type":"text"},{"text":"stmmac@f8103000","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"ethernet: stmmac@f8103000 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&gmac_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_gmac-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"gmac_pins: pinmux_gmac-pins {\n function = \"GMAC\";\n groups = \"GMAC_RGMII\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"GMAC_RGMII","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group of GMAC which is mapped to GPIO [3, 4, 5, 6, 13, 14, 10, 11, 7, 8, 15, 16, 9, 12]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":3},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SD Card","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of SD card of SP7350, ","type":"text"},{"text":"[D1, D0, CLK, CMD, D3, D2]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[38, 39, 40, 41, 42, 43]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up SD card pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to SD card node ","type":"text"},{"text":"mmc@f8003e80","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"mmc1: mmc@f8003e80 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&sdcard_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_sdcard-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sdcard_pins: pinmux_sdcard-pins {\n function = \"SD_CARD\";\n groups = \"SD_CARD\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"SD_CARD","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group of SD card which is mapped to GPIO [38, 39, 40, 41, 42, 43]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":4},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SDIO","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of SDIO of SP7350, ","type":"text"},{"text":"[D1, D0, CLK, CMD, D3, D2]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[44, 45, 46, 47, 48, 49]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up SDIO pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to SDIO node ","type":"text"},{"text":"sdio@f8008400","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sdio: sdio@f8008400 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&sdio_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_sdio-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sdio_pins: pinmux_sdio-pins {\n function = \"SDIO\";\n groups = \"SDIO\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"SDIO","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group of SDIO which is mapped to GPIO [44, 45, 46, 47, 48, 49]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":5},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SPI-NOR Flash","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of SPI-NOR flash of SP7350, ","type":"text"},{"text":"[D2, CLK, D1, D3, CSB, D0]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[21, 22, 23, 24, 25, 26]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up pins of SPI-NOR flash, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to SPI-NOR flash node ","type":"text"},{"text":"spinor@f8000b00","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sp_spinor0: spinor@f8000b00 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&spi_nor_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_spi_nor-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"spi_nor_pins: pinmux_spi_nor-pins {\n function = \"SPI_FLASH\";\n groups = \"SPI_FLASH\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"SPI_FLASH","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group of SPI-NOR FLASH which is mapped to GPIO [21, 22, 23, 24, 25, 26]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":6},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SPI-NAND Flash","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of SPI-NAND flash of SP7350, ","type":"text"},{"text":"[D0, D2, CLK, D1, D3, CSB]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[30, 31, 32, 33, 34, 35]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[21, 22, 23, 24, 25, 26]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up pins of SPI-NAND flash, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to SPI-NAND flash node ","type":"text"},{"text":"spinand@f8002b80","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"spinand0: spinand@f8002b80 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&spi_nand_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_spi_nand-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"spi_nand_pins: pinmux_spi_nand-pins {\n function = \"SPI_NAND\";\n groups = \"SPI_NAND_X1\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String ","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"SPI_NAND_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of SPI-NAND flash which is mapped to GPIO [30, 31, 32, 33, 34, 35]. Users can also use string ","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"SPI_NAND_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for the pin-group 2 which is mapped to GPIO [21, 22, 23, 24, 25, 26]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":7},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"8-bit NAND Flash","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of 8-bit NAND flash of SP7350, ","type":"text"},{"text":"[RDY0, WP_B, CE_B, RE_B, CLE, ALE, WE_B, D0, D1, D2, D3, D4, D5, D6, D7]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to pin-group GPIO ","type":"text"},{"text":"[20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up 8-bit NAND FLASH pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to 8-bit NAND flash node ","type":"text"},{"text":"paranand@f8120000","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"paranand0: paranand@f8120000 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <¶_nand_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_para_nand-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"para_nand_pins: pinmux_para_nand-pins {\n function = \"PARA_NAND\";\n groups = \"PARA_NAND\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PARA_NAND","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group of 8-bit NAND flash which is mapped to GPIO [20, 21, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":8},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"UART0","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of UART0 of SP7350, ","type":"text"},{"text":"[TXD, RXD]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[50, 51]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[68, 69]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up UART0 pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to UART0 node ","type":"text"},{"text":"serial@f8801900","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart0: serial@f8801900 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&uart0_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_uart0-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart0_pins: pinmux_uart0-pins {\n function = \"UART0\";\n groups = \"UART0_X1\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"UART0_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of UART0 which is mapped to GPIO [50, 51]. Users can also use string ","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"UART0_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 2 which is mapped to GPIO [68, 69]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":9},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"UART1","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of UART1 of SP7350, ","type":"text"},{"text":"[TXD, RXD]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[52, 53]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[64, 65]","type":"text","marks":[{"type":"strong"}]},{"text":". Flow-control pins of UART1 of SP7350, ","type":"text"},{"text":"[RTS, CTS]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[54, 55]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[66, 67]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up UART1 pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to UART1 node ","type":"text"},{"text":"serial@f8801980","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart1: serial@f8801980 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&uart1_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"If flow-control is needed, for example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart1: serial@f8801980 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&uart1_pins &uart1_fc_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes ","type":"text"},{"text":"pinmux_uart1-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinmux_uart1_fc-pins ","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart1_pins: pinmux_uart1-pins {\n function = \"UART1\";\n groups = \"UART1_X1\";\n};\n\nuart1_fc_pins: pinmux_uart1_fc-pins {\n function = \"UART1_FC\";\n groups = \"UART1_FC_X1\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"UART1_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of UART1 which is mapped to GPIO [52, 53]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"UART1_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for the pin-group 2 which is mapped to GPIO [64, 65].","type":"text"}]},{"type":"paragraph","content":[{"text":"String ","type":"text"},{"text":"\"","type":"text","marks":[{"type":"em"}]},{"text":"UART1_FC_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\"","type":"text","marks":[{"type":"em"}]},{"text":" are defined for the pin-groups 1 of flow-control of UART1 which is mapped to GPIO [54, 55]. Users can also use string ","type":"text"},{"text":"\"","type":"text","marks":[{"type":"em"}]},{"text":"UART1_FC_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\"","type":"text","marks":[{"type":"em"}]},{"text":" for the pin-groups 2 which is mapped to GPIO [54, 55]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":10},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"I2C0","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pins of I2C0 of SP7350, ","type":"text"},{"text":"[CLK, DATA]","type":"text","marks":[{"type":"strong"}]},{"text":", can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[68, 69]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[54, 55]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up I2C0 pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to I2C0 node ","type":"text"},{"text":"i2c@f8828000","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c0: i2c@f8828000 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&i2c_combo0_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definition of sub-nodes","type":"text"}]},{"type":"paragraph","content":[{"text":"pinmux_i2c_combo0-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c_combo0_pins: pinmux_i2c_combo0-pins {\n function = \"I2C_COMBO0\";\n groups = \"I2C_COMBO0_X1\";\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"I2C_COMBO0_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of I2C0 which is mapped to GPIO [68, 69]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"I2C_COMBO0_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for the pin-group 2 of I2C0 which is mapped to GPIO [54, 55]. Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":11},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"PWM","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"PWM0","type":"text","marks":[{"type":"strong"}]},{"text":" of SP7350 can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[78]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[58]","type":"text","marks":[{"type":"strong"}]},{"text":". ","type":"text"},{"text":"PWM1","type":"text","marks":[{"type":"strong"}]},{"text":" can be multiplexed to either pin GPIO ","type":"text"},{"text":"[79]","type":"text","marks":[{"type":"strong"}]},{"text":" or GPIO ","type":"text"},{"text":"[59]","type":"text","marks":[{"type":"strong"}]},{"text":". ","type":"text"},{"text":"PWM2","type":"text","marks":[{"type":"strong"}]},{"text":" can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[60]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[92]","type":"text","marks":[{"type":"strong"}]},{"text":". ","type":"text"},{"text":"PWM3","type":"text","marks":[{"type":"strong"}]},{"text":" can be multiplexed to either pin-group GPIO ","type":"text"},{"text":"[61]","type":"text","marks":[{"type":"strong"}]},{"text":" or pin-group GPIO ","type":"text"},{"text":"[93]","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"paragraph","content":[{"text":"To set up PWM pins, users need to add properties ","type":"text"},{"text":"pinctrl-names","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" and ","type":"text"},{"text":"pinctrl-0","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" to PWM node ","type":"text"},{"text":"pwm@f8800d80","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" in device-tree source file. For example, set up PWM0:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"pwm: pwm@f8800d80 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pwm0_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"Or, for example, set up PWM0, PWM1, PWM2, PWM3:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"pwm: pwm@f8800d80 {\n \t:\n \t:\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins &pwm3_pins>;\n :\n :\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"The following device-tree source of SP7350 shows definitions of sub-nodes","type":"text"}]},{"type":"paragraph","content":[{"text":"pinmux_pwm0-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":", ","type":"text"},{"text":"pinmux_pwm1-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":", ","type":"text"},{"text":"pinmux_pwm2-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":", ","type":"text"},{"text":"pinmux_pwm3-pins","type":"text","marks":[{"type":"strong"},{"type":"em"}]}]},{"type":"paragraph","content":[{"text":"of node ","type":"text"},{"text":"pinctrl@f8800080","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":".","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"pwm0_pins: pinmux_pwm0-pins {\n function = \"PWM0\";\n groups = \"PWM0_X1\";\n};\n\npwm1_pins: pinmux_pwm1-pins {\n function = \"PWM1\";\n groups = \"PWM1_X1\";\n};\n\npwm2_pins: pinmux_pwm2-pins {\n function = \"PWM2\";\n groups = \"PWM2_X1\";\n};\n\npwm3_pins: pinmux_pwm3-pins {\n function = \"PWM3\";\n groups = \"PWM3_X1\";\n};\n","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM0_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of PWM0 which is mapped to GPIO [78]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM0_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for pin group 2 which is mapped to GPIO [58].","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM1_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of PWM1 which is mapped to GPIO [79]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM1_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for pin group 2 which is mapped to GPIO [59].","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM2_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of PWM2 which is mapped to GPIO [60]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM2_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for pin group 2 which is mapped to GPIO [92].","type":"text"}]},{"type":"paragraph","content":[{"text":"String","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM3_X1","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" is defined for the pin-group 1 of PWM3 which is mapped to GPIO [61]. Users can also use string","type":"text"},{"text":"“","type":"text","marks":[{"type":"em"}]},{"text":"PWM3_X2","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"”","type":"text","marks":[{"type":"em"}]},{"text":" for pin group 2 which is mapped to GPIO [93].","type":"text"}]},{"type":"paragraph","content":[{"text":"Refer to \"","type":"text"},{"text":"Function-group Table","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":"\" in ","type":"text"},{"text":"Appendix","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]},{"type":"heading","attrs":{"level":3},"content":[{"text":"pinconf","type":"text","marks":[{"type":"strong"}]}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"One Configuration to All Pins.","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"Pin configuration will be applied to all pins included by property \"","type":"text"},{"text":"pins","type":"text","marks":[{"type":"strong"}]},{"text":"\" or \"","type":"text"},{"text":"groups","type":"text","marks":[{"type":"strong"}]},{"text":"\". For example:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart0_pins: pinmux_uart0-pins {\n function = \"UART0\";\n \tgroups = \"UART0_X1\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"\"drive-strength-microamp = ;\"","type":"text","marks":[{"type":"strong"},{"type":"em"}]},{"text":" indicates that setting drive strength to 15.2mA on ","type":"text"},{"text":"GPIO50","type":"text","marks":[{"type":"strong"}]},{"text":" and ","type":"text"},{"text":"GPIO51","type":"text","marks":[{"type":"strong"}]},{"text":" included by group \"","type":"text"},{"text":"UART0_X1","type":"text","marks":[{"type":"strong"}]},{"text":"\".","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":2},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"Different Configurations to Different Pins.","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"paragraph","content":[{"text":"If users want to set different drive strength on GPIO50 and GPIO51 respectively，do as below:","type":"text"}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"uart0_pins: pinmux_uart0-pins {\n \tpinmux{\n function = \"UART0\";\n groups = \"UART0_X1\";\n };\n \n pinconf_tx {\n pins = \"GPIO50\";\n drive-strength-microamp = ;\n };\n \n pinconf_rx {\n pins = \"GPIO51\";\n drive-strength-microamp = ;\n };\n};","type":"text"}]},{"type":"paragraph","content":[{"text":"Other supported pin configurations are supposed to be configured in the same way.","type":"text","marks":[{"type":"strong"}]}]},{"type":"paragraph"},{"type":"paragraph","content":[{"text":"Here lists some examples of pin configuration on ","type":"text"},{"text":"sp7350-ev.dts","type":"text","marks":[{"type":"em"}]},{"text":":","type":"text"}]},{"type":"orderedList","attrs":{"order":1},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SD card","type":"text","marks":[{"type":"strong"}]},{"text":" with typical drive source current ","type":"text"},{"text":"17.7mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 6.5mA, Max: 34.6mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sdcard_pins: pinmux_sdcard-pins {\n function = \"SD_CARD\";\n groups = \"SD_CARD\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":2},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"SDIO ","type":"text","marks":[{"type":"strong"}]},{"text":"with typical drive source current ","type":"text"},{"text":"17.7mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 6.5mA, Max: 34.6mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"sdio_pins: pinmux_sdio-pins {\n function = \"SDIO\";\n groups = \"SDIO\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":3},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"GMAC","type":"text","marks":[{"type":"strong"}]}]}]}]},{"type":"bulletList","content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"TXD0(GPIO7), TXD1(GPIO8), TXC(GPIO10), TXEN(GPIO11), TXD2(GPIO15), TXD3(GPIO16)","type":"text","marks":[{"type":"strong"}]},{"text":" with typical drive source current ","type":"text"},{"text":"16.4mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 11.3mA, Max: 21.6mA) for ","type":"text"},{"text":"GPIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"RXC(GPIO3), RXDV(GPIO4), RXD0(GPIO5), RXD1(GPIO6), RXD2(GPIO13), RXD3(GPIO14)","type":"text","marks":[{"type":"strong"}]},{"text":" with typical drive source current ","type":"text"},{"text":"8.2mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 5.7mA, Max: 10.8mA) for ","type":"text"},{"text":"GPIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]},{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"MDC(GPIO9), MDIO(GPIO12)","type":"text","marks":[{"type":"strong"}]},{"text":" with typical drive source current ","type":"text"},{"text":"8.2mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 5.7mA, Max: 10.8mA) for ","type":"text"},{"text":"GPIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"gmac_pins: pinmux_gmac-pins {\n \tpinmux{\n function = \"GMAC\";\n \tgroups = \"GMAC_RGMII\";\n };\n \n pinconf0 {\n pins = \"GPIO7\",\"GPIO8\",\"GPIO10\",\"GPIO11\",\"GPIO15\",\"GPIO16\";\n drive-strength-microamp = ;\n };\n \n pinconf1 {\n \tpins = \"GPIO3\",\"GPIO4\",\"GPIO5\",\"GPIO6\",\"GPIO13\",\"GPIO14\";\n drive-strength-microamp = ;\n };\n \n pinconf3 {\n \tpins = \"GPIO9\",\"GPIO12\";\n drive-strength-microamp = ;\n };\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":4},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"eMMC","type":"text","marks":[{"type":"strong"}]},{"text":" with typical drive source current ","type":"text"},{"text":"17.7mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 6.5mA, Max: 34.6mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"emmc_pins: pinmux_emmc-pins {\n function = \"EMMC\";\n groups = \"EMMC\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":5},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"I2C0 ","type":"text","marks":[{"type":"strong"}]},{"text":"with typical drive source current ","type":"text"},{"text":"15.2mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 5.6mA, Max: 29.7mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c_combo0_pins: pinmux_i2c_combo0-pins {\n function = \"I2C_COMBO0\";\n groups = \"I2C_COMBO0_X1\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":6},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"I2C1 ","type":"text","marks":[{"type":"strong"}]},{"text":"with typical drive source current ","type":"text"},{"text":"15.2mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 5.6mA, Max: 29.7mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c_combo1_pins: pinmux_i2c_combo1-pins {\n function = \"I2C_COMBO1\";\n groups = \"I2C_COMBO1\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":7},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"I2C2 ","type":"text","marks":[{"type":"strong"}]},{"text":"with typical drive source current ","type":"text"},{"text":"15.2mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 5.6mA, Max: 29.7mA) for ","type":"text"},{"text":"DVIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c_combo2_pins: pinmux_i2c_combo2-pins {\n function = \"I2C_COMBO2\";\n groups = \"I2C_COMBO2_X1\";\n drive-strength-microamp = ;\n};","type":"text"}]},{"type":"paragraph"},{"type":"orderedList","attrs":{"order":8},"content":[{"type":"listItem","content":[{"type":"paragraph","content":[{"text":"I2C3 ","type":"text","marks":[{"type":"strong"}]},{"text":"with typical drive source current ","type":"text"},{"text":"9.9mA","type":"text","marks":[{"type":"strong"}]},{"text":" (Min: 6.8mA, Max: 13.0mA) for ","type":"text"},{"text":"GPIO","type":"text","marks":[{"type":"strong"}]},{"text":".","type":"text"}]}]}]},{"type":"codeBlock","attrs":{"language":"plain"},"content":[{"text":"i2c_combo3_pins: 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