Case download:
fbio_selftest.zip
1 Design Brief
The SP7021 SOC platform LOOPBACK self-test experiment is mainly used to test the reliability of the SOC platform connection. The design of the Bus Bridge is placed on the FPGA daughter board. The Plus1 chip reads and writes the Bus Bridge to realize the reliability test of the connection between the Plus1 chip and the FPGA daughter board pin .
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