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Items | Subsystem | Explanations |
1 | Global | 12V DC power input. The diameter of the DC Jack plug is 5.5mm. The power supply current of the adapter must be greater than 1A. |
2 | Global | Main-power switch. Turn down to ON, and turn up to OFF. |
3 | Slave | Pin-headers (3x1, 100mill) of GPIO J10: For connecting I2C0 and I2C1 signals of Slave C3V-W. Pin-headers J12: For connecting SPI_CB4 signals of Slave C3V-W. Pin-headers J14: For connecting PWM (0, 1) and I2C2 signals of Slave C3V-W. |
4 | Slave | CM4 console (UA6) of Slave C3V-W. Note GND is at the most bottom pin. It is default serial port of Cortex M4. The default baud rate is 115,200. No parity and 1 stop-bit. |
5 | Slave | Main console (UA0) of Slave C3V-W. Note GND is at the most bottom pin. This is default serial port of i-boot, x-boot, Trusted Firmware-A (TF-A), U-Boot and Linux kernel. The default baud rate is 115,200. No parity and 1 stop-bit. |
6 | Slave | 8 GiB LPDDR4 SDRAM of Slave C3V-W |
7 | Global | Boot configuration switch |
8 | Slave | Jumper header J31. Plug a jumper in to supply power for burning OTP of Slave C3V-W chip. |
9 | Master | Socket of micro SD card of Master C3V-W |
10 | Slave | Type C socket of USB 3.1 Gen1 of Slave C3V-W. It supports Low/Full/High/Super speeds, supports Host, Device and DRD. Current limit of VBUS is 1A. |
11 | Slave | Slave C3V-W chip (15mm x 15mm, 526-pin, TF-BGA) |
12 | Slave | 8 GiB eMMC of Slave C3V-W |
13 | Master | RJ-45 socket of Ethernet of Master C3V-W. It supports 10M/100M/1000M speeds. |
14 | Slave | Socket of micro SD card of Slave C3V-W |
15 | Master | 8 GiB eMMC of Master C3V-W |
16 | Master | Jumper header J26. Plug a jumper in to supply power for burning OTP of Master C3V-W chip. |
17 | Master | Master C3V-W chip (15mm x 15mm, 526-pin, TF-BGA) |
18 | Master | Type C socket of USB 3.1 Gen1 of Master C3V-W. It supports Low/Full/High/Super speeds, supports Host, Device and DRD. Current limit of VBUS is 1A. |
19 | Global | Reset key. Reset CM4 and main power-domains, but does not reset RTC. |
20 | Master | CM4 console (UA6) of Master C3V-W. Note GND is at the most left pin. It is default serial port of Cortex M4. The default baud rate is 115,200. No parity and 1 stop-bit. |
21 | Master | 8 GiB LPDDR4 SDRAM of Master C3V-W |
22 | Master | Main console (UA0) of Master C3V-W. Note GND is at the most right pin. This is default serial port of i-boot, x-boot, Trusted Firmware-A (TF-A), U-Boot and Linux kernel. The default baud rate is 115,200. No parity and 1 stop-bit. |
23 | Master | Pin-headers J11: For connecting I2C0 and I2C1 signals of Master C3V-W. Pin-headers J13: For connecting SPI_CB5 signals of Master C3V-W. Pin-headers J15: For connecting PWM (3x10, 100mill1) and I2C2 signals of GPIO of Master C3V-W. |
2. Boot Devices and Configuration
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CPIO interfaces are setup in x-boot for both Master and Slave C3V-W chip.
4.1 Menu config setup of x-boot
For Master C3V-W, please run make xconfig at project top directory. Refer to picture below, when menu pops up, move cursor to “CPIO Mode” and select Master.
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For Slave C3V-W, please run make xconfig at project top directory. Refer to picture below, when menu pops up, move cursor to “CPIO Mode” and select Slave.
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4.2 Synchronization of CPIO interface
CPIO of Master and Slave C3V-W should be initialized and training at the same time. Two pair of GPIO signal are used to synchronize the initialization and training.
Direction | Master C3V-W | Slave C3V-W |
|---|---|---|
Slave → Master | GPIO72 (RX) | GPIO96 (TX) |
Master → Slave | GPIO74 (TX) | GPIO94 (RX) |
Master C3V waits for GPIO72 being HIGH. Set GPIO74 to HIGH and start to train CPIO after receiving HIGH of GPIO72.
Slave C3V set GPIO96 to HIGH and then wait for GPIO94 being HIGH. Start to train CPIO after receiving HIGH of GPIO94.
5. Boot Flow of Software
As normal C3V-W system, Master C3V-W runs i-boot, x-boot, TF-A, OP-TEE, U-Boot, and then Linux while Slave C3V-W stops running after it completes DRAM initialization. Master C3V-W can access any devices including DRAM in Slave C3V-W subsystem.
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