Disclaimer
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Channel | Data Lane # | Virtual Channel # | Remarks |
|---|---|---|---|
RX0 | 2 | 2 | Not available in this package |
RX1 | 2 | 2 | Not available in this package |
RX2 | 2 | 2 | |
RX3 | 2 | 2 | |
RX4 | 2 | 2 | |
RX5 | 4 | 4 |
It's important to note that RX2 and RX3 share pins with the CPIO interface. Therefore, only one of RX2/RX3 or the CPIO interface can be active at any given time.
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This table delineates the power domains and their respective supplying voltages, along with the hardware pin names and their corresponding supplying power pins for all IO pins of C3V-W. Such organization facilitates efficient management and utilization of GPIO pins within the system.
14.
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2
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Table of Default State of Power-on of GPIO
Ball Name | ST | DS[3:0] | SL | PE | PS | SPU | Remarks |
G_MX0 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX1 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
G_MX2 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
G_MX3 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
G_MX4 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-down |
G_MX5 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX6 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX7 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX8 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX9 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
G_MX10 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
G_MX11 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX12 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX13 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX14 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX15 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX16 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX17 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX18 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
G_MX19 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX30 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX31 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX32 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX33 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX34 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX35 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX36 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX37 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX38 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX39 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX40 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX41 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX42 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX43 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX44 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX45 | 1 | 1 | 1 | 1 | 0 | 0 | Pull-down |
AO_MX46 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX47 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
AO_MX48 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX0 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX1 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX2 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX3 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX4 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX5 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
IV_MX6 | 1 | 1 | 1 | 1 | 1 | 0 | Pull-up |
ST (Schmitt Trigger Input): 1 indicates enabled, 0 indicates disabled.
DS[3:0] (Driving Strength): Refer to Table 15.4.1 for values.
SL (Slew Rate Control): 1 indicates enabled, 0 indicates disabled.
PE (Pull Enable): 1 indicates pull-up/down enabled, 0 indicates disabled.
PS (Pull Selector): 1 indicates pull-up, 0 indicates pull-down.
SPU (Strong Pull Up): 1 indicates enabled, 0 indicates disabled.
14.
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3 Table of Default State of Power-on of
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DVIO
Ball Name | ST | DS[3:0] | PU | PD | Remarks |
G_MX20 | 1 | 3 | 1 | 0 | Pull-up |
G_MX21 | 1 | 3 | 1 | 0 | Pull-up |
G_MX22 | 1 | 3 | 0 | 1 | Pull-down |
G_MX23 | 1 | 3 | 1 | 0 | Pull-up |
G_MX24 | 1 | 3 | 1 | 0 | Pull-up |
G_MX25 | 1 | 3 | 1 | 0 | Pull-up |
G_MX26 | 1 | 3 | 1 | 0 | Pull-up |
G_MX27 | 1 | 3 | 0 | 1 | Pull-down |
G_MX28 | 1 | 3 | 1 | 0 | Pull-up |
G_MX29 | 1 | 3 | 1 | 0 | Pull-up |
G_MX30 | 1 | 3 | 1 | 0 | Pull-up |
G_MX31 | 1 | 3 | 1 | 0 | Pull-up |
G_MX32 | 1 | 3 | 0 | 1 | Pull-down |
G_MX33 | 1 | 3 | 1 | 0 | Pull-up |
G_MX34 | 1 | 3 | 1 | 0 | Pull-up |
G_MX35 | 1 | 3 | 1 | 0 | Pull-up |
G_MX36 | 1 | 3 | 1 | 0 | Pull-up |
G_MX37 | 1 | 3 | 1 | 0 | Pull-up |
G_MX38 | 1 | 3 | 0 | 0 | HiZ |
G_MX39 | 1 | 3 | 0 | 0 | HiZ |
G_MX40 | 1 | 3 | 0 | 0 | HiZ |
G_MX41 | 1 | 3 | 0 | 0 | HiZ |
G_MX42 | 1 | 3 | 0 | 0 | HiZ |
G_MX43 | 1 | 3 | 0 | 0 | HiZ |
G_MX44 | 1 | 3 | 0 | 0 | HiZ |
G_MX45 | 1 | 3 | 0 | 0 | HiZ |
G_MX46 | 1 | 3 | 0 | 0 | HiZ |
G_MX47 | 1 | 3 | 0 | 0 | HiZ |
G_MX48 | 1 | 3 | 0 | 0 | HiZ |
G_MX49 | 1 | 3 | 0 | 0 | HiZ |
AO_MX0 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX1 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX2 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX3 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX4 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX5 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX6 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX7 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX8 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX9 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX10 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX11 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX12 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX13 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX14 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX15 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX16 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX17 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX18 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX19 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX20 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX21 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX22 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX23 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX24 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX25 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX26 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX27 | 1 | 3 | 1 | 0 | Pull-up |
AO_MX28 | 1 | 3 | 0 | 1 | Pull-down |
AO_MX29 | 1 | 3 | 1 | 0 | Pull-up |
ST (Schmitt Trigger Input): 1 indicates enabled, 0 indicates disabled.
DS[3:0] (Driving Strength): Refer to Table 15.4.2 for values.
PU (Pull Up): 1 indicates pull-up, 0 indicates disabled.
PD (PUll Down): 1 indicates pull-down, 0 indicates disabled.
14.
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4 GPIO Interrupt
The C3V-W provides eight external interrupt inputs from configured GPIO pins. The table below lists the external interrupts 0 to 7 and the corresponding pins each interrupt can be configured with:
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In the table, X1 denotes the 1st signal output position. X2 denotes the 2nd signal output position. X3 denotes the 3rd signal output position. X11 denotes the 11th signal output position.
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5 Alternative Function of GPIO
Many GPIO (General Purpose Input/Output) pins offer alternative functions, providing versatility in their usage. These alternatives may consist of one, two, or more sets of output pins. For instance, I2C0 can be configured to output signals either at AO_MX4 (I2C0_CLK) and AO_MX5 (I2C0_DATA), or at AO_MX18 (I2C0_CLK) and AO_MX19 (I2C0_DATA). Below is a comprehensive table listing the alternatives for all GPIO pins:
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