Disclaimer
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Channel | Data Lane # | Virtual Channel # | Remarks |
|---|---|---|---|
RX0 | 2 | 2 | Not available in this package |
RX1 | 2 | 2 | Not available in this package |
RX2 | 2 | 2 | |
RX3 | 2 | 2 | |
RX4 | 2 | 2 | |
RX5 | 4 | 4 |
It's important to note that RX2 and RX3 share pins with the CPIO interface. Therefore, only one of RX2/RX3 or the CPIO interface can be active at any given time.
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The GPIO pins of C3V-W are organized into 10 distinct groups, each with its dedicated power supply. Refer to the table below for a breakdown of the power domains, supplying voltages, hardware pin names, and the corresponding supplying power pins for all IO pins of C3V-W:
GPIO # | Power Domain | Type | Pin Name | Power-supply Pin |
0 - 19 | Main | 1.8V GPIO | G_MX0 - G_MX19 | VDDPST18_GPIO |
20 | 1.8V/3.2V DVIO | G_MX20 | VDDPST3018_DVIO_2 | |
21 - 27 | G_MX21 - G_MX27 | VDDPST3018_DVIO_1 | ||
28 - 37 | G_MX28 - G_MX37 | VDDPST3018_DVIO_2 | ||
38 - 43 | SD Card | G_MX38 - G_MX43 | AVDDIO_3018_SD | |
44 - 49 | SDIO | G_MX44 - G_MX49 | AVDDIO_3018_SDIO | |
50 - 59 | CM4 (AO) | 1.8V/3.2V DVIO | AO_MX0 - AO_MX9 | VDDPST3018_DVIO_AO_1 |
60 - 69 | AO_MX10 - AO_MX19 | VDDPST3018_DVIO_AO_2 | ||
70 - 79 | AO_MX20 - AO_MX29 | VDDPST3018_DVIO_AO_3 | ||
80 - 98 | 1.8V GPIO | AO_MX30 - AO_MX48 | VDDPST18_GPIO_AO | |
99 - 105 | IV_MX0 - IV_MX6 |
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