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1. Modify Device-tree Source

To enable and configure PWM pins, edit the PWM node in the device-tree source. For the SP7350 Evaluation Board, you can find the file at "arch/arm64/boot/dts/sunplus/sp7350-ev.dts" within the kernel directory.

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The subnodes under "pinctrl", "pinmux_pwm0-pins", "pinmux_pwm1-pins", "pinmux_pwm2-pins", and "pinmux_pwm3-pins", configure the output pins for PWM channels 0, 1, 2, and 3. These channels correspond to the pins AO_MX8, AO_MX9, AO_MX10, and AO_MX11, respectively. For detailed pin configurations, please refer to the table available at https://sunplus.atlassian.net/wiki/spaces/C3/pages/1971126471/SP7350+Specification#13.3-Pulse-Width-Modulation-(PWM). Each PWM output can support two pin positions:

2. Enable Linux PWM Driver

The Linux PWM driver should be enabled by default. Confirm by running make kconfig in the project top directory and check "Device Drivers" → "Pulse-width Modulation (PWM) support" for "Sunplus PWM support". Refer to screenshot of Linux Kernel Configuration menu below:

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3. Build Linux Image

Whether you modify the device-tree source or kernel features, execute the make command to build the Linux image.

4. Check PWM Output Pins

After booting into Linux, you can check the pin assignments by running:

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• GPIO58 (AO_MX8) is set to PWM0 (X2 position)

• GPIO59 (AO_MX9) is set to PWM1 (X2 position)

• GPIO60 (AO_MX10) is set to PWM2 (X1 position)

• GPIO61 (AO_MX11) is set to PWM3 (X1 position)

5. Using PWM with the sysfs Interface

A straightforward sysfs interface is available for PWM control from userspace. The path to this interface is /sys/class/pwm/pwmchipN, where N represents the base of the PWM controller. Since the SP7350 has only one PWM controller, N is 0. Within this directory, you'll find the following files and directories: npwm, export, unexport, and so on.

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To set the PWM channels to the specified configurations, you can use the following commands:

PWM0 to 1 kHz with 25% duty cycle:

~ # echo 1000000 > /sys/class/pwm/pwmchip0/pwm0/period
~ # echo 250000 > /sys/class/pwm/pwmchip0/pwm0/duty_cycle
~ # echo 1 > /sys/class/pwm/pwmchip0/pwm0/enable

PWM1 to 2 kHz with 50% duty cycle:

~ # echo 500000 > /sys/class/pwm/pwmchip0/pwm1/period
~ # echo 250000 > /sys/class/pwm/pwmchip0/pwm1/duty_cycle
~ # echo 1 > /sys/class/pwm/pwmchip0/pwm1/enable

PWM2 to 1 kHz with 75% duty cycle:

~ # echo 500000 > /sys/class/pwm/pwmchip0/pwm2/period
~ # echo 375000 > /sys/class/pwm/pwmchip0/pwm2/duty_cycle
~ # echo 1 > /sys/class/pwm/pwmchip0/pwm2/enable

PWM3 to 1 kHz with 20% duty cycle and inverted:

~ # echo 1000000 > /sys/class/pwm/pwmchip0/pwm3/period
~ # echo 200000 > /sys/class/pwm/pwmchip0/pwm3/duty_cycle
~ # echo inversed > /sys/class/pwm/pwmchip0/pwm3/polarity
~ # echo 1 > /sys/class/pwm/pwmchip0/pwm3/enable

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• Channels:

  • C1 (yellow) - PWM0 signal

  • C2 (red) - PWM1 signal

  • C3 (blue) - PWM2 signal

  • C4 (green) - PWM3 signal

• PWM Signal:

  • Period:

    • PWM0 and PWM3: 1 millisecond

    • PWM1 and PWM2: 0.5 millisecond

  • Duty Cycle:

    • PWM0: 25%

    • PWM1: 50%

    • PWM2: 75%

    • PWM3: 20% (inverted)

6. PWMtest

Refer to GitHub - simonqin09/PWMtest which provides a PWM test program.