Disclaimer
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Channel | Data Lane # | Virtual Channel # | Remarks |
|---|---|---|---|
RX0 | 2 | 2 | Not available in this package |
RX1 | 2 | 2 | Not available in this package |
RX2 | 2 | 2 | |
RX3 | 2 | 2 | Not available for version A chips. |
RX4 | 2 | 2 | |
RX5 | 4 | 4 |
It's important to note that RX2 and RX3 share pins with the CPIO interface. Therefore, only one of RX2/RX3 or the CPIO interface can be active at any given time.
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Powers | Nominal Voltage (V) | FF corner (average) | Sim (peak) | Unit | |
|---|---|---|---|---|---|
37°C | 120°C | 85°C | |||
DPHY_0V8 | 0.8 | 320 | 430 | 420 | mA |
MIPI_0V8 | 0.8 | 68 | 90 | mA | |
SYS_0V8 | 0.8 | 363 | 550 | 2140 | mA |
VDD_CA55 | 0.85 | 895 | 1889 | 1940940 | mA |
VDD_NPU | 0.85 | 930 | 1078 | 5390 | mA |
VDD_VV | 0.8 | 262 | 397 | 1670 | mA |
VDDQ | 1.1 | 337 | 344 | mA | |
MIPI_1V8 | 1.8 | 6.5 | 6.7 | 19 | mA |
SYS_1V8 | 1.8 | 20 | 21 | mA | |
SYS_3V | 3.0 | 75 | 76 | mA | |
SYS_3V3 | 3.3 | 210 | 237 | mA | |
AO_0V8 | 0.8 | 45 | 80 | mA | |
AO_1.8V | 1.8 | 19 | 20 | mA | |
AO_3.0V | 3.0 | 10 | 10 | mA | |
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