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Address | Group No. | Register Name | Description |
|---|---|---|---|
0x9C000780 | G15.0 | intr type[0] | Interrupt type register0 |
0x9C000784 | G15.1 | intr type[1] | Interrupt type register1 |
0x9C000788 | G15.2 | intr type[2] | Interrupt type register2 |
0x9C00078C | G15.3 | intr type[3] | Interrupt type register3 |
0x9C000790 | G15.4 | intr type[4] | Interrupt type register4 |
0x9C000794 | G15.5 | intr type[5] | Interrupt type register5 |
0x9C000798 | G15.6 | intr type[6] | Interrupt type register6 |
0x9C00079C | G15.7 | intr polarity[0] | Interrupt polarity register0 |
0x9C0007A0 | G15.8 | intr polarity[1] | Interrupt polarity register1 |
0x9C0007A4 | G15.9 | intr polarity[2] | Interrupt polarity register2 |
0x9C0007A8 | G15.10 | intr polarity[3] | Interrupt polarity register3 |
0x9C0007AC | G15.11 | intr polarity[4] | Interrupt polarity register4 |
0x9C0007B0 | G15.12 | intr polarity[5] | Interrupt polarity register5 |
0x9C0007B4 | G15.13 | intr polarity[6] | Interrupt polarity register6 |
0x9C0007B8 | G15.14 | ACHIP CA7 priority[0] | ACHIP priority CA7 priority register0 |
0x9C0007BC | G15.15 | ACHIP priorityCA7 priority[1] | ACHIP CA7 priority register1 |
0x9C0007C0 | G15.16 | ACHIP CA7 priority[2] | ACHIP CA7 priority register2 |
0x9C0007C4 | G15.17 | ACHIP CA7 priority[3] | ACHIP CA7 priority register3 |
0x9C0007C8 | G15.18 | ACHIP CA7 priority[4] | ACHIP CA7 priority register4 |
0x9C0007CC | G15.19 | ACHIP CA7 priority[5] | ACHIP CA7 priority register5 |
0x9C0007D0 | G15.20 | ACHIP CA7 priority[6] | ACHIP CA7 priority register6 |
0x9C0007D4 | G15.21 | ACHIP CA7 intr mask[0] | ACHIP CA7 interrupt mask register0 |
0x9C0007D8 | G15.22 | ACHIP CA7 intr mask[1] | ACHIP CA7 interrupt mask register1 |
0x9C0007DC | G15.23 | ACHIP CA7 intr mask[2] | ACHIP CA7 interrupt mask register2 |
0x9C0007E0 | G15.24 | ACHIP CA7 intr mask[3] | ACHIP CA7 interrupt mask register3 |
0x9C0007E4 | G15.25 | ACHIP CA7 intr mask[4] | ACHIP CA7 interrupt mask register4 |
0x9C0007E8 | G15.26 | ACHIP CA7 intr mask[5] | ACHIP CA7 interrupt mask register5 |
0x9C0007EC | G15.27 | ACHIP CA7 intr mask[6] | ACHIP CA7 interrupt mask register6 |
0x9C0007F0 | G15.28 | rsv | Reserve |
0x9C0007F4 | G15.29 | rsv | Reserve |
0x9C0007F8 | G15.30 | rsv | Reserve |
0x9C0007FC | G15.31 | rsv | Reserve |
...
Address | Group No. | Register Name | Description |
|---|---|---|---|
0x9C000A80 | G21.0 | ACHIP CA7 intr clr[0] | ACHIP CA7 interrupt clear register0 |
0x9C000A84 | G21.1 | ACHIP CA7 intr clr[1] | ACHIP CA7 interrupt clear register1 |
0x9C000A88 | G21.2 | ACHIP CA7 intr clr[2] | ACHIP CA7 interrupt clear register2 |
0x9C000A8C | G21.3 | ACHIP CA7 intr clr[3] | ACHIP CA7 interrupt clear register3 |
0x9C000A90 | G21.4 | ACHIP CA7 intr clr[4] | ACHIP CA7 interrupt clear register4 |
0x9C000A94 | G21.5 | ACHIP CA7 intr clr[5] | ACHIP CA7 interrupt clear register5 |
0x9C000A98 | G21.6 | ACHIP CA7 intr clr[6] | ACHIP CA7 interrupt clear register6 |
0x9C000A9C | G21.7 | masked ACHIP CA7 fiqs[0] | Masked ACHIP CA7 FIQ register0 |
0x9C000AA0 | G21.8 | masked ACHIP CA7 fiqs[1] | Masked ACHIP CA7 FIQ register1 |
0x9C000AA4 | G21.9 | masked ACHIP CA7 fiqs[2] | Masked ACHIP CA7 FIQ register2 |
0x9C000AA8 | G21.10 | masked ACHIP CA7 fiqs[3] | Masked ACHIP CA7 FIQ register3 |
0x9C000AAC | G21.11 | masked ACHIP CA7 fiqs[4] | Masked ACHIP CA7 FIQ register4 |
0x9C000AB0 | G21.12 | masked ACHIP CA7 fiqs[5] | Masked ACHIP CA7 FIQ register5 |
0x9C000AB4 | G21.13 | masked ACHIP CA7 fiqs[6] | Masked ACHIP CA7 FIQ register6 |
0x9C000AB8 | G21.14 | masked ACHIP CA7 irqs[0] | Masked ACHIP CA7 IRQ register0 |
0x9C000ABC | G21.15 | masked ACHIP CA7 irqs[0] | Masked ACHIP CA7 IRQ register1 |
0x9C000AC0 | G21.16 | masked ACHIP CA7 irqs[0] | Masked ACHIP CA7 IRQ register2 |
0x9C000AC4 | G21.17 | masked ACHIP CA7 irqs[0] | Masked ACHIP CA7 IRQ register3 |
0x9C000AC8 | G21.18 | masked ACHIP CA7 irqs[0] | Masked ACHIP CA7 IRQ register4 |
0x9C000ACC | G21.19 | masked ACHIP CA7 irqs[5] | Masked ACHIP CA7 IRQ register5 |
0x9C000AD0 | G21.20 | masked ACHIP CA7 irqs[6] | Masked ACHIP CA7 IRQ register6 |
0x9C000AD4 | G21.21 | rsv | Reserve |
0x9C000AD8 | G21.22 | rsv | Reserve |
0x9C000ADC | G21.23 | rsv | Reserve |
0x9C000AE0 | G21.24 | rsv | Reserve |
0x9C000AE4 | G21.25 | rsv | Reserve |
0x9C000AE8 | G21.26 | rsv | Reserve |
0x9C000AEC | G21.27 | rsv | Reserve |
0x9C000AF0 | G21.28 | rsv | Reserve |
0x9C000AF4 | G21.29 | rsv | Reserve |
0x9C000AF8 | G21.30 | rsv | Reserve |
0x9C000AFC | G21.31 | intr group | Interrupt group register |
...
| Field Name | Bit | Access | Description |
| Reserve | 31:8 | RO | |
| intr polarity[199:192] | 7:0 | RW | Determine interrupt polarity from bit 192 to 199 0: high-active(default) 1: low-active |
15.14 ACHIP CA7 priority register0 (ACHIPCA7 priority[0])
Address: 0x9C0007B8
Reset:0xffff ffff
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[31:0] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 0 to 31 0: fiq(default) 1: irq |
15.15 ACHIP CA7 priority register1 (ACHIPCA7 priority[1])
Address: 0x9C0007BC
...
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[63:32] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 32 to 63 0: fiq(default) 1: irq |
15.16 ACHIP CA7 priority register2 (ACHIPCA7 priority[2])
Address: 0x9C0007C0
Reset:0xffff ffff
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[95:64] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 64 to 95 0: fiq(default) 1: irq |
15.17 ACHIP CA7 priority register3 (ACHIPCA7 priority[3])
Address: 0x9C0007C4
Reset: 0xffff ffff
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[127:96] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 96 to 127 0: fiq(default) 1: irq |
15.18 ACHIP CA7 priority register4 (ACHIPCA7 priority[4])
Address: 0x9C0007C8
Reset: 0xffff ffff
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[159:128] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 128 to 159 0: fiq(default) 1: irq |
15.19 ACHIP CA7 priority register5 (ACHIPCA7 priority[5])
Address: 0x9C0007CC
Reset: 0xffff ffff
...
| Field Name | Bit | Access | Description |
| ACHIP CA7 priority[191:160] | 31:0 | RW | Determine ACHIP CA7 interrupt priority from bit 160 to 191 0: fiq(default) 1: irq |
15.20 ACHIP CA7 priority register6 (ACHIPCA7 priority[6])
Address: 0x9C0007D0
Reset: 0x0000 00ff
| Field Name | Bit | Access | Description |
| Reserve | 31:8 | RO | |
| ACHIP CA7 priority[199:192] | 7:0 | RW | Determine ACHIP CA7 interrupt priority from bit 192 to 199 0: fiq(default) 1: irq |
15.21 ACHIP CA7 interrupt mask register0 (ACHIPCA7 intr mask[0])
Address: 0x9C0007D4
Reset: 0x0000 0000
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[31:0] | 31:0 | RW | Mask ACHIP CA7 interrupt from bit 0 to 31 0: masked(default) 1: pass |
15.22 ACHIP CA7 interrupt mask register1 (ACHIPCA7 intr mask[1])
Address: 0x9C0007D8
Reset: 0x0000 0000
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[63:32] | 31:0 | RW | Mask ACHIP Mask CA7 interrupt from bit 32 to 63 0: masked(default) 1: pass |
15.23ACHIP23 CA7 interrupt mask register2 (ACHIPCA7 intr mask[2])
Address: 0x9C0007DC
Reset: 0x0000 0000
...
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[95:64] | 31:0 | RW | Mask ACHIP CA7 interrupt from bit 64 to 95 0: masked(default) 1: pass |
15.24 ACHIP CA7 interrupt mask register3 (ACHIPCA7 intr mask[3])
Address: 0x9C0007E0
Reset: 0x0000 0000
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[127:96] | 31:0 | RW | Mask ACHIP interrupt CA7 interrupt from bit 96 to 127 0: masked(default) 1: pass |
15.25 ACHIP CA7 interrupt mask register4 (ACHIPCA7 intr mask[4])
Address: 0x9C0007E4
Reset: 0x0000 0000
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[159:128] | 31:0 | RW | Mask ACHIP CA7 interrupt from bit 128 to 159 0: masked(default) 1: pass |
15.26 ACHIP CA7 interrupt mask register5 (ACHIPCA7 intr mask[5])
Address: 0x9C0007E8
Reset: 0x0000 0000
| Field Name | Bit | Access | Description |
| ACHIP CA7 intr mask[191:160] | 31:0 | RW | Mask ACHIP CA7 interrupt from bit 160 to 191 0: masked(default) 1: pass |
15.27 ACHIP CA7 interrupt mask register6 (ACHIPCA7 intr mask[6])
Address: 0x9C0007EC
Reset: 0x0000 0000
...
| Field Name | Bit | Access | Description |
| Reserve | 31:8 | RO | |
| ACHIP CA7 intr mask[199:192] | 7:0 | RW | Mask ACHIP CA7 interrupt from bit 192 to 199 0: masked(default) 1: pass |
...
RGST Table Group 21 INTERRUPT 3
21.0 ACHIP CA7 interrupt clear register0 (ACHIPCA7 intr clr[0])
Address: 0x9C000A80
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[31:0] | 31:0 | WO | Clear ACHIP interrupt CA7 interrupt from bit 0 to 31 |
21.1 ACHIP CA7 interrupt clear register1 (ACHIPCA7 intr clr[1])
Address: 0x9C000A84
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[63:32] | 31:0 | WO | Clear ACHIP CA7 interrupt from bit 32 to 63 |
21.2 ACHIP CA7 interrupt clear register2 (ACHIPCA7 intr clr[2])
Address: 0x9C000A88
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[95:64] | 31:0 | WO | Clear ACHIP CA7 interrupt from bit 64 to 95 |
21.3 ACHIP CA7 interrupt clear register3 (ACHIPCA7 intr clr[3])
Address: 0x9C000A8C
Reset: 0x0000 0000
...
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[127:96] | 31:0 | WO | Clear ACHIP interrupt CA7 interrupt from bit 96 to 127 |
21.4 ACHIP CA7 interrupt clear register4 (ACHIPCA7 intr clr[4])
Address: 0x9C000A90
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[159:128] | 31:0 | WO | Clear ACHIP CA7 interrupt from bit 128 to 159 |
21.5 ACHIP CA7 interrupt clear register5 (ACHIPCA7 intr clr[5])
Address: 0x9C000A94
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| ACHIP CA7 intr clr[191:160] | 31:0 | WO | Clear ACHIP CA7 interrupt from bit 160 to 191 |
21.6 ACHIP CA7 interrupt clear register6 (ACHIPCA7 intr clr[6])
Address: 0x9C000A98
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
Reserve | 31:8 | WO | Reserve |
| CA7 intr clr[199:192] |
| 7:0 | WO | Clear |
| CA7 interrupt from bit 192 to 199 |
21.7 Masked ACHIP CA7 FIQ register0 (masked ACHIP CA7 fiqs[0])
Address: 0x9C000A9C
Reset: 0x0000 0000
...
Field Name | Bit | Access | Description |
| masked ACHIP fiqsCA7fiqs[31:0] | 31:0 | RO | Read masked ACHIP CA7 fiqs from bit 0 to 31 |
21.8 Masked ACHIP CA7 FIQ register1 (masked ACHIP CA7 fiqs[1])
Address: 0x9C000AA0
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked |
| CA7 fiqs[63:32] | 31:0 | RO | Read masked |
| CA7 fiqs from bit 32 to 63 |
21.9 Masked ACHIP CA7 FIQ register2 (masked ACHIP CA7 fiqs[2])
Address: 0x9C000AA4
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 fiqs[95:64] | 31:0 | RO | Read masked ACHIP CA7 fiqs from bit 64 to 95 |
21.10 Masked ACHIP CA7 FIQ register3 (masked ACHIP CA7 fiqs[3])
Address: 0x9C000AA8
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 fiqs[127:96] | 31:0 | RO | Read masked ACHIP CA7 fiqs from bit 96 to 127 |
21.11 Masked ACHIP CA7 FIQ register4 (masked ACHIP CA7 fiqs[4])
Address: 0x9C000AAC
Reset: 0x0000 0000
...
Field Name | Bit | Access | Description |
| masked ACHIP CA7 fiqs[159:128] | 31:0 | RO | Read masked ACHIP CA7 fiqs from bit 128 to 159 |
21.12 Masked ACHIP CA7 FIQ register5 (masked ACHIP CA7 fiqs[5])
Address: 0x9C000AB0
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 fiqs[191:160] | 31:0 | RO | Read masked ACHIP CA7 fiqs from bit 160 to 191 |
21.13 Masked ACHIP CA7 FIQ register6 (masked ACHIP CA7 fiqs[6])
Address: 0x9C000AB4
Reset: 0x0000 0000
Field Name | Bit |
Access
Access | Description | ||
Reserve | 31:8 | RO | Reserve |
| masked |
| CA7 fiqs[199:192] |
| 7:0 |
| RO | Read masked |
| CA7 fiqs from bit 192 to 199 |
21.14 Masked ACHIP CA7 IRQ register0 (masked ACHIP CA7 irqs[0])
Address: 0x9C000AB8
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[31:0] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 0 to 31 |
21.15 Masked ACHIP CA7 IRQ register1 (masked ACHIP CA7 irqs[1])
Address: 0x9C000ABC
Reset: 0x0000 0000
...
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[63:32] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 32 to 63 |
21.16 Masked ACHIP CA7 IRQ register2 (masked ACHIP CA7 irqs[2])
Address: 0x9C000AC0
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[95:64] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 64 to 95 |
21.17 Masked ACHIP CA7 IRQ register3 (masked ACHIP CA7 irqs[3])
Address: 0x9C000AC4
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[127:96] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 96 to 127 |
21.18 Masked ACHIP CA7 IRQ register4 (masked ACHIP CA7 irqs[4])
Address: 0x9C000AC8
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[159:128] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 128 to 159 |
21.19 Masked ACHIP CA7 IRQ register5 (masked ACHIP CA7 irqs[5])
Address: 0x9C000ACC
Reset: 0x0000 0000
...
Field Name | Bit | Access | Description |
| masked ACHIP CA7 irqs[191:160] | 31:0 | RO | Read masked ACHIP CA7 irqs from bit 160 to 191 |
21.20 Masked ACHIP CA7 IRQ register6 (masked ACHIP CA7 irqs[6])
Address: 0x9C000AD0
Reset: 0x0000 0000
Field Name | Bit | Access | Description |
Reserve | 31:8 | RO | Reserve |
| masked |
| CA7 irqs[199:192] |
| 7:0 | RO |
| Read masked |
| CA7 irqs from bit 192 to 199 |
21.21 Reserve (rsv)
Address: 0x9C000AD4
Reset: 0x0000 0000
...