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The Timer0 and Timer1 consist of 11-bit down and auto-reload counter driven by a programmable 14-bit pre-scaler. The Timer2 and Timer3 consist of a 16-bit down and auto-reload counter driven by programmable 14-bit or 16-bit pre-scaler. The Timer0/1/2/3 are completely independent and don't share any resource. The Timer0/1 can combine to 22-bit timer; timer2/3 can combine to 32-bit timer. This timer module also include one 20-bit watchdog timer, one 33-bit Standard Time ClockTimer Counter (STC), one 34-bit Attendance Timer Counter (ATC) and one 24-bit Real Time Counter (RTC).
The control registers locate in RGST table Group12 which memory map to 0x9C000600~0x9C00067F.
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- Timer0: A 11-bit timer.
- Timer1: A 11-bit timer.
- Timer2: A 16-bit timer.
- Timer3: A 16-bit timer.
- Watchdog Timer: A 20-bit timer
- RTC counter: A 24-bit real time counter.
- ATC counter: A 24-bit attendance time timer counter.
- STC counter: A 33-bit standard timer clock counter
- STC_EXT: Generate STC_EXTCLK block
- Register interface: The interface of timer module communication with CPU.
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9.5.1 STC Pre-scaler And Counter
STC (Standard Timer ClockCounter) is a 14-bit pre-scaler counter. As Figure 17-5, STC pre-scaler will divide the SYSCLK or STC_EXTCLK then generate STC_TRIG signal.
In the applications, STC_TRIG usually is a 90 kHz signal. STC Counter will increase after trigger by STC_TRIG. This is the outline of the STC counter working mode. The paragraph follows will explain the pre-scaler and counter details.
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