1 设计简介

SP7021 SOC平台自测实验主要用来测试SOC平台连接的可靠性，FBIO的设计放在FPGA子板上，通过Plus1 芯片对FBIO的读写，实现Plus1 芯片与FPGA子板管脚连接的可靠性测试。Case download:
fbio_selftest.zip

1 Design Brief

The SP7021 SOC platform LOOPBACK self-test experiment is mainly used to test the reliability of the SOC platform connection. The design of the Bus Bridge is placed on the FPGA daughter board. The Plus1 chip reads and writes the Bus Bridge to realize the reliability test of the connection between the Plus1 chip and the FPGA daughter board pin .

1.1  SP7021

...

SP7021 SOC平台自测实验只需将FBIO Wrapper的axi_m和axi_s 64bit总线接口对接在一起，并做相应的地址映射，即将FBIO起始地址0x70000000的访问映射为对Plus1 芯片内DRAM起始地址0x00000000的访问；如下图所示：

...

本实验以Plus1 7021实践平台配套的FPGA子板和IP验证子板完成相关实验，FPGA子板的开发工具采用XILINX的Vivado集成开发环境(版本号为2018.3);为了方便将用户自己需要验证的IP方便连接到SOC系统中验证，本实验提供了相应的设计参考基础文件，如下

...

设计案例与SP7021主板与FPGA子板脚位对应连接关系如下表所示：

...

SOC platform self-test design experiment project hardware platform implementation

The SP7021 SOC platform self-test experiment only needs to connect the axim and axis bus interfaces of the Bus Bridge together, and do the corresponding address mapping. That is, the access to the Bus Bridge start address 0x70000000 is mapped to the access to the DRAM start address 0x00000000 in the SP7021 chip ;As shown below:

...

 This experiment uses the FPGA daughter board supporting the SP7021 practice platform to complete the relevant experiments. The development tool of the FPGA daughter board uses Xilinx's Vivado integrated development environment (version number 2018.3); in order to facilitate the connection of the user's own verification IP to the SOC system Verification, this experiment provides the corresponding design reference basic files, as follows

...

The corresponding connection between the design case and the pin connection of the SP7021 motherboard and FPGA daughter board is shown in the following table: 1: U20B on the motherboard is connected to J2 of the FPGA daughter board (Pin pin corresponding, such as 1-51 ...), 提供主板上的Plus1 主芯片与FPGA的数据传输通道

...

providing the data transmission channel between the Plus1 main chip on the motherboard and the FPGA

...

1.2 

...

在IDE 环境中如下图所示，选择sp7021工程名，单击鼠标右键在弹出的菜单中选Copy

...

接下来再次选择sp7021工程名;

...

单击鼠标右键在弹出的菜单中选Paste,出现下图

...

在Project name框中填写fbio_selftest,完成fbio_selftest 工程名及目录建立，如下图所示

...

Implementation of SP7021 SOC platform self-testing experiment system software platform

In the IDE environment, as shown below, select the sp7021 project name, click the right mouse button and select Copy in the pop-up menu

...

Next, select the sp7021 project name again;

...

Click the right mouse button and select Paste in the pop-up menu, the following picture appears

...

Fill in the fbio_selftest in the Project name box to complete the establishment of the fbio_selftest project name and directory, as shown below

...

Next, you need to copy all the files and folders under the installation directory \SP7021\example\ fbio_selftest下的所有文件及文件夹到上面建好的fbio_selftest工程目录中(路径为：安装目录 selftest to the fbio_selftest project directory built above (the path is: installation directory \SP7021\ workspace\fbio_selftest\), 同名文件选择覆盖，这样SP7021 SOC平台自测试设计实践所需的程序代码main.c；放到如下的路径中:1） 安装目录 the file with the same name is selected to be overwritten, so the program code main.c required for SP7021 SOC platform self-test design practice; put in the following path:

1） In the install directory \SP7021\workspace\fbio_selftest\ 文件夹下的mainmain.c 最后按下图所示，鼠标选中红框1，接着点击鼠标右键出现下拉菜单，然后选中红框2，对刚才复制动作做刷新，这样刚才复制的文件就能在IDE环境中显示出来。

Finally, as shown in the figure below, select the red box 1 with the mouse, then click the right mouse button to display the drop-down menu, and then select the red box 2, refresh the copy action just now, so that the file just copied can be displayed in the IDE environment.

...

main.c

int main(void)

{

    printf("Build @%s, %s\n", __DATE__, __TIME__);

    hw_init();

    sys_init();

    pin_mux();

    disp_hdmi_init();

    fbio_self_test();

    printf("fbio self test finished \n");

    while(1);

}

对比数码管控制IP实验，增加了fbioCompared with the digital tube control IP experiment, the fbio_self_test () 函数，用来完成SP7021 SOC平台自测实验操作，如下讲解。function is added to complete the SP7021 SOC platform self-test experimental operation, as explained below.

void fbio_self_test()

{

    unsigned int i,temp;

    for (i = 0; i < 200; i++)

        fbio_addr[i]=i;

    for (i = 0; i < 100; i++)

    {

        temp=fbio_addr[i];

        if(temp==i)

            printf("@write value=[%x]; read value= [%x]\n", i,temp);

        else

            printf("Error @ temp= [%x];i= [%x] \n", temp,i);

    }

}

第一个for循通过fbio实现对Plus1 芯片的DRAM地址空间1到200的写操作；

第一个for循通过fbio实现对Plus1 芯片的DRAM地址空间1到100的读操作；并将读出的内容与写入的内容进行比较，若不同，则打印Error信息；

程序代码运行

在Plus1 IDE环境中compile后，下载到平台，在terminal窗口看到如下信息The first for loop uses fbio to write to the DRAM address space 1 to 200 of the Plus1 chip;

The second for loop reads the DRAM address space 1 to 100 of the Plus1 chip through fbio module; compares the read content with the written content, and if it is different, prints the Error message;

1.3 Program code running

After compile in the Plus1 IDE environment, download to the platform and see the following information in the terminal window

...