SP7021 SOC platform self-test experiment

Case download:
fbio_selftest.zip

1 Design Brief

The SP7021 SOC platform LOOPBACK self-test experiment is mainly used to test the reliability of the SOC platform connection. The design of the Bus Bridge is placed on the FPGA daughter board. The Plus1 chip reads and writes the Bus Bridge to realize the reliability test of the connection between the Plus1 chip and the FPGA daughter board pin .

1.1  SP7021 SOC platform self-test design experiment project hardware platform implementation

The SP7021 SOC platform self-test experiment only needs to connect the axim and axis bus interfaces of the Bus Bridge together, and do the corresponding address mapping. That is, the access to the Bus Bridge start address 0x70000000 is mapped to the access to the DRAM start address 0x00000000 in the SP7021 chip ;As shown below:

 This experiment uses the FPGA daughter board supporting the SP7021 practice platform to complete the relevant experiments. The development tool of the FPGA daughter board uses Xilinx's Vivado integrated development environment (version number 2018.3); in order to facilitate the connection of the user's own verification IP to the SOC system Verification, this experiment provides the corresponding design reference basic files, as follows

The corresponding connection between the design case and the pin connection of the SP7021 motherboard and FPGA daughter board is shown in the following table: 1: U20B on the motherboard is connected to J2 of the FPGA daughter board (Pin pin corresponding, such as 1-51 ...), providing the data transmission channel between the Plus1 main chip on the motherboard and the FPGA

1.2  Implementation of SP7021 SOC platform self-testing experiment system software platform

In the IDE environment, as shown below, select the sp7021 project name, click the right mouse button and select Copy in the pop-up menu

Next, select the sp7021 project name again;

Click the right mouse button and select Paste in the pop-up menu, the following picture appears

Fill in the fbio_selftest in the Project name box to complete the establishment of the fbio_selftest project name and directory, as shown below

Next, you need to copy all the files and folders under the installation directory \SP7021\example\ fbio_selftest to the fbio_selftest project directory built above (the path is: installation directory \SP7021\ workspace\fbio_selftest\), the file with the same name is selected to be overwritten, so the program code main.c required for SP7021 SOC platform self-test design practice; put in the following path:

1） In the install directory \SP7021\workspace\fbio_selftest\ main.c

Finally, as shown in the figure below, select the red box 1 with the mouse, then click the right mouse button to display the drop-down menu, and then select the red box 2, refresh the copy action just now, so that the file just copied can be displayed in the IDE environment.

main.c

int main(void)

{

    printf("Build @%s, %s\n", __DATE__, __TIME__);

    hw_init();

    sys_init();

    pin_mux();

    disp_hdmi_init();

    fbio_self_test();

    printf("fbio self test finished \n");

    while(1);

}

Compared with the digital tube control IP experiment, the fbio_self_test () function is added to complete the SP7021 SOC platform self-test experimental operation, as explained below.

void fbio_self_test()

{

    unsigned int i,temp;

    for (i = 0; i < 200; i++)

        fbio_addr[i]=i;

    for (i = 0; i < 100; i++)

    {

        temp=fbio_addr[i];

        if(temp==i)

            printf("@write value=[%x]; read value= [%x]\n", i,temp);

        else

            printf("Error @ temp= [%x];i= [%x] \n", temp,i);

    }

}

The first for loop uses fbio to write to the DRAM address space 1 to 200 of the Plus1 chip;

The second for loop reads the DRAM address space 1 to 100 of the Plus1 chip through fbio module; compares the read content with the written content, and if it is different, prints the Error message;

1.3 Program code running

After compile in the Plus1 IDE environment, download to the platform and see the following information in the terminal window