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Design Demo | FPGA daughter board | SP7021 mother board | |||||
uart_apb | J1 | U1F | U20A | J17 | |||
Top Port Name | Schematic Name | FPGA I/O | Schematic Name | Schematic Name | |||
| 1 | GND |
| 1 | GND | 3 | GND |
| 2 | GND |
| 2 | GND | 4 | GND |
FPGA_TX | 3 | B35_L23_N | K1 | 3 | B35_L23_N | 5 | B35_L23_N |
| 4 | B35_L23_P | K2 | 4 | B35_L23_P | 6 | B35_L23_P |
| 5 | VIN |
| 5 | VIN | 1 | VCC |
| 6 | VCCIO35 |
| 6 | VCCIO35 | 2 | VCC |
FPGA_RX | 7 | B35_L15_N | G2 | 7 | B35_L15_N | 7 | B35_L15_N |
| 8 | B35_L15_P | H2 | 8 | B35_L15_P | 8 | B35_L15_P |
| 9 | B35_L13_N | F3 | 9 | B35_L13_N | 9 | B35_L13_N |
| 10 | B35_L13_P | F4 | 10 | B35_L13_P | 10 | B35_L13_P |
| 11 | B35_L12_N | D3 | 11 | B35_L12_N | 11 | B35_L12_N |
| 12 | B35_L12_P | E3 | 12 | B35_L12_P | 12 | B35_L12_P |
| 13 | B35_L22_P | J3 | 13 | B35_L22_P | 13 | B35_L22_P |
| 14 | B35_L22_N | J2 | 14 | B35_L22_N | 14 | B35_L22_N |
| 15 | B35_L17_N | G1 | 15 | B35_L17_N | 15 | B35_L17_N |
| 16 | B35_L17_P | H1 | 16 | B35_L17_P | 16 | B35_L17_P |
| 17 | B35_L18_N | E1 | 17 | B35_L18_N | 17 | B35_L18_N |
| 18 | B35_L18_P | F1 | 18 | B35_L18_P | 18 | B35_L18_P |
| 19 | B35_L14_N | D2 | 19 | B35_L14_N | 19 | B35_L14_N |
| 20 | B35_L14_P | E2 | 20 | B35_L14_P | 20 | B35_L14_P |
| 21 | B35_L16_P | C2 | 21 | B35_L16_P | 21 | B35_L16_P |
| 22 | B35_L16_N | C1 | 22 | B35_L16_N | 22 | B35_L16_N |
| 23 | B35_L9_N | A1 | 23 | B35_L9_N | 23 | B35_L9_N |
| 24 | B35_L9_P | B1 | 24 | B35_L9_P | 24 | B35_L9_P |
| 25 | B35_L10_P | B3 | 25 | B35_L10_P | 25 | B35_L10_P |
| 26 | B35_L10_N | B2 | 26 | B35_L10_N | 26 | B35_L10_N |
| 27 | B35_L8_N | A3 | 27 | B35_L8_N | 27 | B35_L8_N |
| 28 | B35_L8_P | A4 | 28 | B35_L8_P | 28 | B35_L8_P |
| 29 | B35_L11_N | D4 | 29 | B35_L11_N | 29 | B35_L11_N |
| 30 | B35_L11_P | D5 | 30 | B35_L11_P | 30 | B35_L11_P |
| 31 | B35_L3_N | A5 | 31 | B35_L3_N | 31 | B35_L3_N |
| 32 | B35_L3_P | A6 | 32 | B35_L3_P | 32 | B35_L3_P |
| 33 | B35_L2_N | B6 | 33 | B35_L2_N | 33 | B35_L2_N |
| 34 | B35_L2_P | B7 | 34 | B35_L2_P | 34 | B35_L2_P |
| 35 | B35_L7_N | B4 | 35 | B35_L7_N | 35 | B35_L7_N |
| 36 | B35_L7_P | C4 | 36 | B35_L7_P | 36 | B35_L7_P |
| 37 | B35_L1_N | C5 | 37 | B35_L1_N | 37 | B35_L1_N |
| 38 | B35_L1_P | C6 | 38 | B35_L1_P | 38 | B35_L1_P |
| 39 | B35_L5_N | E5 | 39 | B35_L5_N | 39 | B35_L5_N |
| 40 | B35_L5_P | E6 | 40 | B35_L5_P | 40 | B35_L5_P |
| 41 | B35_L6_N | D7 | 41 | B35_L6_N | 41 | B35_L6_N |
| 42 | B35_L6_P | E7 | 42 | B35_L6_P | 42 | B35_L6_P |
| 43 | B35_L19_P | G6 | 43 | B35_L19_P | 43 | B35_L19_P |
| 44 | B35_L19_N | F6 | 44 | B35_L19_N | 44 | B35_L19_N |
| 45 | VCCIO35 |
| 45 | VCCIO35 | 49 | VCC |
| 46 | VIN |
| 46 | VIN | 50 | VCC |
| 47 | B35_L4_N | C7 | 47 | B35_L4_N | 45 | B35_L4_N |
| 48 | B35_L4_P | D8 | 48 | B35_L4_P | 46 | B35_L4_P |
| 49 | GND |
| 49 | GND | 47 | GND |
| 50 | GND |
| 50 | GND | 48 | GND |
6.2Implementation of System Software Platform for UART Controller IP Design Experiment Project
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Next, you need to copy all the files and folders under the installation directory \SP7021\example\uart_apb to the uart_apb project directory built above (the path is: installation directory \SP7021\workspace\uart_apb\), the file with the same name is selected to be overwritten, so that the UART The program codes main.c; uart.c; uart.h required for the IP design practice of the controller are placed in the following paths:
1） Install main.c in In the install directory \SP7021\workspace\uart_apb\main.c
2） Install uart.c in In the install directory \SP7021\workspace\uart_apb\testapi\util\uart.c
3） Install uart.h in the In the install directory \SP7021\workspace\uart_apb\include\util folder\uart.h
Finally, as shown in the figure below, the mouse selects the red box 1, then clicks the right mouse button to appear the drop-down menu, and then selects the red box 2, refresh the copy action just now, so that the file just copied can be displayed in the IDE environment
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