Title: | Full duplex asynchronous serial communication UART controller IP design | |
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Owner: | y.wang@sunmedia.com.cn (Unlicensed) | |
Creator: | y.wang@sunmedia.com.cn (Unlicensed) | Apr 29, 2020 |
Last Changed by: | y.wang@sunmedia.com.cn (Unlicensed) | Feb 05, 2021 |
Tiny Link: (useful for email) | https://sunplus.atlassian.net/wiki/x/JILCK | |
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SP7021 FPGA Program (1)
Full duplex asynchronous serial communication UART controller IP design
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