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Title:	Appendix Plus1 7021 SOC IP project development example
Owner:	y.wang@sunmedia.com.cn (Unlicensed)
Creator:	y.wang@sunmedia.com.cn (Unlicensed)	Apr 29, 2020
Last Changed by:	y.wang@sunmedia.com.cn (Unlicensed)	Feb 05, 2021
Tiny Link: (useful for email)	https://sunplus.atlassian.net/wiki/x/A4DZK
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Children (4)
    Page: SP7021 SOC platform self-test experiment
    Page: Open source RISC-V CPU core design practice
    Page: SPI FLASH Controller IP design
    Page: Full duplex asynchronous serial communication UART controller IP design

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Time	Editor
Feb 05, 2021 02:34	y.wang@sunmedia.com.cn (Unlicensed)	View Changes
May 15, 2020 02:32	Michael Su	View Changes
May 13, 2020 07:56	Michael Su	View Changes
May 13, 2020 07:30	Michael Su	View Changes
Apr 29, 2020 01:03	y.wang@sunmedia.com.cn (Unlicensed)

SP7021 FPGA Program (1)     Page: Appendix Plus1 7021 SOC IP project development example