8. Electrical Characteristics

V_DVD33, V_{VDD33_AO}

Supply voltage 3.3V

-0.3

3.45

V

V_DVDD15

Supply voltage 1.5V, DDR3_VDDQ

-0.075

1.575

V

V_CVDD12

Supply voltage 1.2V

-0.12

1.32

V

V_CVDD09

Supply voltage 0.9V

-0.045

1

V

V_O

Output voltage

-0.3

V_DVD33 + 0.3

V

V_i

Input voltage (non 5V tolerant inputs)

-0.3

V_DVD33 + 0.3

V

V_i5vtol

Input voltage (5V tolerant inputs)

-0.3

5.5

V

T_J-MAX

Junction temperature

125

°C

T_STG

Storage temperature

-55

150

°C

T_SOL

Lead temperature (soldering, 4 sec)

260

°C

_JA

Thermal resistance, junction to ambient(4 Layer PCB), Ambient 85°C

17.66

C_JT

Junction-to-top characterization parameter

1.63

V_ESD

Human Body Model (test Per JESD22-A114F, Class 2)

2

KV

Charge Device Model (test per JESD22-C101E, Class III)

500

V

I_LA

Latch-up tolerance (test Per JESD78C, Class I)

100

mA

V_DVD33, V_{VDD33_AO}

Supply voltage 3.3V

3.13

3.30

3.45

V

V_DVDD15

Supply voltage 1.5V

1.42

1.50

1.57

V

V_CVDD12

Supply voltage 1.2V

1.18

1.25

1.32

V

V_CVDD09

Supply voltage 0.9V

0.90

0.95

1.00

V

T_J

Operating Junction temperature

125

°C

T_OPT

Operating temperature

-40

85

°C

TMDSTX Specification

AVcc

Termination Supply Voltage

3.135

3.465

V

R_T

Termination Resistance

4.5

5.5

Ω

V_OFF

Single-ended standby(off) output voltage

AVcc-10mV

AVcc+10mV

V

V_swing

Single-ended output swing voltage

400

600

mV

V_H

Single-ended high level output voltage

Attached Sink supports <= 165MHz

AVcc-10mV

AVcc+10mV

V

Attached Sink supports > 165MHz

AVcc-200mV

AVcc+10mV

V

V_H

Single-ended low level output voltage

Attached Sink supports <= 165MHz

AVcc-600mV

AVcc-400mV

V

Attached Sink supports > 165MHz

AVcc-700mV

AVcc-400mV

V

MIPI Basic Specification

AVDD

Analog operation Voltage

1.08

1.2

1.32

V

VDD

Core operation voltage

1.08

1.2

1.32

V

Temp

Operating temperature range

-40

125

℃

TStart

Power up/Power down time

1.08

20

uS

MIPI HS Mode

VCMRX(DC)

Common-mode voltage HS receive mode

70

330

mV

VIDTH

Differential input high threshold

70

mV

VIDTL

Differential input low threshold

-70

mV

VIHHS

Single-ended input high voltage

460

mV

VILHS

Single-ended input low voltage

-40

mV

VOD

Differential voltage swing

70

mV

FCLK

Operating frequency

80

750

MHz

VTERM-EN

Single-ended threshold for HS termination enable

450

mV

ZID

Differential input impedance

80

100

125

Ω

MIPI LP Mode

V_IH

Logic 1 input voltage

880

mV

V_IL

Logic 0 input voltage, not in ULP State

550

mV

V_IL-ULPS

Logic 0 input voltage, ULP State

300

mV

V_HYST

Input hysteresis

25

mV

GPIO

V_IL

Input Low Voltage

-0.3

0.8

V

V_IH

Input High Voltage

2

5.5

V

V_OL

Output Low Voltage

0.4

V

V_OH

Output High Voltage

2.4

V

I_OL

Low Output Current @ V_OL (max) (Port 1 ~ 8)

08:08mA

9.4

14.8

19.8

mA

I_OL 1

Low Output Current @ V_OL (max) (Port 0)

16:16mA

18.9

29.5

39.6

mA

I_OH

High Output Current @ V_OL (min) (Port 1 ~ 8)

08:08mA

14.0

28.7

48.2

mA

I_OH 1

High Output Current @ V_OL (min) (Port 0)

16:16mA

27.2

55.6

93.4

mA

Power Specification

Supply current @ SYSCLK = 202 MHz / Ram Test @ 25’c

Power Saving

mA

I₀₉

0.9V supply current

265

865

mA

I₁₂

1.2V supply current

1075

1700

mA

I₁₅

1.5V supply current

170

200

mA

I₃₃

3.3V supply current

73

mA

I_{OTP_AVDDQ}

OTP supply current for burning

38

40

mA

P_D

Power dissipation

_202MHz

2024

mW

P_s

Standby mode

_{AO33V@32.768KHz}

3.00

mW

P_u

Ultra Low Standby mode

_{AO33V@32.768KHz}

1.75

mW

MIN.

Typ.

MAX.

tCK

Clock cycle for SPI NOR Flash

9.88

D0

ns

tCKH

Clock high-level width for SPI NOR Flash

4.94