4. Pin Description
4.1 SP7021 Pin Assignment
Figure 4-1 SP7021 Pin Assignment
4.2 SP7021 Pin Type Definitions
Pin Type | Definition |
I/O | Digital Tri-state Output with Schmitt Trigger Input |
S | Power/Ground pin |
A | Analog pin |
I | Digital input pin |
O | Digital Output pin |
Table 1. Pin Type Definitions
4.3 SP7021 Pin Descriptions
Pin Name | LQFP176 Pin No | Type | Description(Multiplex Pins in this interface Shown in Bold) | Drive (mA) |
GPIO_P0_03/ FBIO_1 | 1 | I/O I/O | General purpose I/O Port 0 bit 3 FPGA Bus IO Interface bit 1 For pin Multiplex function, please refer to Chapter 5. | 16 |
GPIO_P0_04/ FBIO_2 | 2 | I/O I/O | General purpose I/O Port 0 bit 4 FPGA Bus IO Interface bit 2 For pin Multiplex function, please refer to Chapter 5. | 16 |
GPIO_P0_05/ FBIO_3 | 3 | I/O I/O | General purpose I/O Port 0 bit 5 FPGA Bus IO Interface bit 3 For pin Multiplex function, please refer to Chapter 5. | 16 |
VDD33_0 | 4 | S | 3.3V I/O power supply pin | - |
GPIO_P0_06/ FBIO_4 | 5 | I/O I/O | General purpose I/O Port 0 bit 6 FPGA Bus IO Interface bit 4 For pin Multiplex function, please refer to Chapter 5. | 16 |
GPIO_P0_07/ FBIO_5 | 6 | I/O I/O | General purpose I/O Port 0 bit 7 FPGA Bus IO Interface bit 5 For pin Multiplex function, please refer to Chapter 5. | 16 |
GPIO_P1_00/ Multiplex Peripheral Pin/ FBIO_6 | 7 | I/O I/O I/O | General purpose I/O Port 1 bit 0 Multiplex Peripheral Pin FPGA Bus IO Interface bit 6 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_01/ Multiplex Peripheral Pin/ FBIO_7 | 8 | I/O I/O I/O | General purpose I/O Port 1 bit 1 Multiplex Peripheral Pin FPGA Bus IO Interface bit 7 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_02/ Multiplex Peripheral Pin/ FBIO_8 | 9 | I/O I/O I/O | General purpose I/O Port 1 bit 2 Multiplex Peripheral Pin FPGA Bus IO Interface bit 8 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_03/ Multiplex Peripheral Pin/ FBIO_9 | 10 | I/O I/O I/O | General purpose I/O Port 1 bit 3 Multiplex Peripheral Pin FPGA Bus IO Interface bit 9 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_04/ Multiplex Peripheral Pin/ FBIO_10 | 11 | I/O I/O I/O | General purpose I/O Port 1 bit 4 Multiplex Peripheral Pin FPGA Bus IO Interface bit 10 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_05/ Multiplex Peripheral Pin/ FBIO_11 | 12 | I/O I/O I/O | General purpose I/O Port 1 bit 5 Multiplex Peripheral Pin FPGA Bus IO Interface bit 11 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_06/ Multiplex Peripheral Pin/ FBIO_12 | 13 | I/O I/O I/O | General purpose I/O Port 1 bit 6 Multiplex Peripheral Pin FPGA Bus IO Interface bit 12 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P1_07/ Multiplex Peripheral Pin/ FBIO_13 | 14 | I/O I/O I/O | General purpose I/O Port 1 bit 7 Multiplex Peripheral Pin FPGA Bus IO Interface bit 13 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_00/ Multiplex Peripheral Pin/ FBIO_14 | 15 | I/O I/O I/O | General purpose I/O Port 2 bit 0 Multiplex Peripheral Pin FPGA Bus IO Interface bit 14 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_01/ Multiplex Peripheral Pin/ FBIO_15 | 16 | I/O I/O I/O | General purpose I/O Port 2 bit 1 Multiplex Peripheral Pin FPGA Bus IO Interface bit 15 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_02/ Multiplex Peripheral Pin/ FBIO_16 | 17 | I/O I/O I/O | General purpose I/O Port 2 bit 2 Multiplex Peripheral Pin FPGA Bus IO Interface bit 16 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_03/ Multiplex Peripheral Pin/ FBIO_TCLK | 18 | I/O I/O I/O | General purpose I/O Port 2 bit 3 Multiplex Peripheral Pin FPGA Bus IO Interface TCLK For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_04/ Multiplex Peripheral Pin/ FBIO_RCLK | 19 | I/O I/O I/O | General purpose I/O Port 2 bit 4 Multiplex Peripheral Pin FPGA Bus IO Interface RCLK For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_05/ Multiplex Peripheral Pin/ FBIO_17 | 20 | I/O I/O I/O | General purpose I/O Port 2 bit 5 Multiplex Peripheral Pin FPGA Bus IO Interface bit 17 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_06/ Multiplex Peripheral Pin/ FBIO_18 | 21 | I/O I/O I/O | General purpose I/O Port 2 bit 6 Multiplex Peripheral Pin FPGA Bus IO Interface bit 18 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P2_07/ Multiplex Peripheral Pin/ FBIO_19 | 22 | I/O I/O I/O | General purpose I/O Port 2 bit 7 Multiplex Peripheral Pin FPGA Bus IO Interface bit 19 For pin Multiplex function, please refer to Chapter 5. | 8 |
CVDD12 | 23 | S | Core power 1.2V | - |
VDD33_1 | 24 | S | I/O power supply pin | - |
GPIO_P3_00/ Multiplex Peripheral Pin/ FBIO_20 | 25 | I/O I/O I/O | General purpose I/O Port 3 bit 0 Multiplex Peripheral Pin FPGA Bus IO Interface bit 20 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_01/ Multiplex Peripheral Pin/ FBIO_21 | 26 | I/O I/O I/O | General purpose I/O Port 3 bit 1 Multiplex Peripheral Pin FPGA Bus IO Interface bit 21 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_02/ Multiplex Peripheral Pin/ FBIO_22 | 27 | I/O I/O I/O | General purpose I/O Port 3 bit 2 Multiplex Peripheral Pin FPGA Bus IO Interface bit 22 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_03/ Multiplex Peripheral Pin/ FBIO_23 | 28 | I/O I/O I/O | General purpose I/O Port 3 bit 3 Multiplex Peripheral Pin FPGA Bus IO Interface bit 23 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_04/ Multiplex Peripheral Pin/ FBIO_24 | 29 | I/O I/O I/O | General purpose I/O Port 3 bit 4 Multiplex Peripheral Pin FPGA Bus IO Interface bit 24 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_05/ Multiplex Peripheral Pin/ FBIO_25 | 30 | I/O I/O I/O | General purpose I/O Port 3 bit 5 Multiplex Peripheral Pin FPGA Bus IO Interface bit 25 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_06/ Multiplex Peripheral Pin/ FBIO_26 | 31 | I/O I/O I/O | General purpose I/O Port 3 bit 6 Multiplex Peripheral Pin FPGA Bus IO Interface bit 26 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P3_07/ Multiplex Peripheral Pin/ FBIO_27 | 32 | I/O I/O I/O | General purpose I/O Port 3 bit 7 Multiplex Peripheral Pin FPGA Bus IO Interface bit 27 For pin Multiplex function, please refer to Chapter 5. | 8 |
VDD09_A | 33 | S | 0.9V core power for C-chip | - |
VDD12_STH | 34 | S |
| - |
VDD12_A | 35 | S | 1.2V core power for C-chip | - |
VDD09_A | 36 | S | 0.9V core power for C-chip | - |
GPIO_P4_00/ Multiplex Peripheral Pin/ FBIO_28 | 37 | I/O I/O I/O | General purpose I/O Port 4 bit 0 Multiplex Peripheral Pin FPGA Bus IO Interface bit 28 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_01/ Multiplex Peripheral Pin/ FBIO_29 | 38 | I/O I/O I/O | General purpose I/O Port 4 bit 1 Multiplex Peripheral Pin FPGA Bus IO Interface bit 29 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_02/ Multiplex Peripheral Pin/ FBIO_30 | 39 | I/O I/O I/O | General purpose I/O Port 4 bit 2 Multiplex Peripheral Pin FPGA Bus IO Interface bit 30 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_03/ Multiplex Peripheral Pin/ FBIO_31 | 40 | I/O I/O I/O | General purpose I/O Port 4 bit 3 Multiplex Peripheral Pin FPGA Bus IO Interface bit 31 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_04/ Multiplex Peripheral Pin/ FBIO_32 | 41 | I/O I/O I/O | General purpose I/O Port 4 bit 4 Multiplex Peripheral Pin FPGA Bus IO Interface bit 32 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_05/ Multiplex Peripheral Pin/ FBIO_33 | 42 | I/O I/O I/O | General purpose I/O Port 4 bit 5 Multiplex Peripheral Pin FPGA Bus IO Interface bit 33 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_06/ Multiplex Peripheral Pin/ FBIO_34 | 43 | I/O I/O I/O | General purpose I/O Port 4 bit 6 Multiplex Peripheral Pin FPGA Bus IO Interface bit 34 For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P4_07/ Multiplex Peripheral Pin/ FBIO_35 | 44 | I/O I/O I/O | General purpose I/O Port 4 bit 7 Multiplex Peripheral Pin FPGA Bus IO Interface bit 35 For pin Multiplex function, please refer to Chapter 5. | 8 |
VDD33_2 | 45 | S | 3.3V I/O power supply pin | - |
CVDD12 | 46 | S | 1.2V Core power | - |
GPIO_P5_00/ Multiplex Peripheral Pin/ FBIO_RSTB | 47 | I/O I/O I/O | General purpose I/O Port 5 bit 0 Multiplex Peripheral Pin FPGA Bus IO Interface RSTB For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_01/ Multiplex Peripheral Pin/ FBIO_EXT0_INT | 48 | I/O I/O I/O | General purpose I/O Port 5 bit 1 Multiplex Peripheral Pin FPGA Bus IO Interface EXT0_INT For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_02/ Multiplex Peripheral Pin/ FBIO_EXT1_INT | 49 | I/O I/O I/O | General purpose I/O Port 5 bit 2 Multiplex Peripheral Pin FPGA Bus IO Interface EXT1_INT For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_03/ Multiplex Peripheral Pin
| 50 | I/O I/O | General purpose I/O Port 5 bit 3 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_04/ Multiplex Peripheral Pin
| 51 | I/O I/O | General purpose I/O Port 5 bit 4 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_05/ Multiplex Peripheral Pin
| 52 | I/O I/O | General purpose I/O Port 5 bit 5 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_06/ Multiplex Peripheral Pin
| 53 | I/O I/O | General purpose I/O Port 5 bit 6 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P5_07/ Multiplex Peripheral Pin
| 54 | I/O I/O | General purpose I/O Port 5 bit 7 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
VDD12_EST | 55 | S |
| - |
VDD12_A | 56 | S | 1.2V power supply | - |
VDD09_A | 57 | S | 0.9V power supply | - |
DCDC09_FB | 58 | S | DCDC-09 Feedback voltage | - |
DCDC09_VI_VDD33 | 59 | S | DCDC-09 3.3V power input | - |
DCDC09_VO | 60 | S | DCDC-09 power output | - |
DCDC09_GND | 61 | S | DCDC-09 Ground | - |
GPIO_P6_00/ Multiplex Peripheral Pin
| 62 | I/O I/O | General purpose I/O Port 6 bit 0 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_01/ Multiplex Peripheral Pin
| 63 | I/O I/O | General purpose I/O Port 6 bit 1 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_02/ Multiplex Peripheral Pin
| 64 | I/O I/O | General purpose I/O Port 6 bit 2 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_03/ Multiplex Peripheral Pin
| 65 | I/O I/O | General purpose I/O Port 6 bit 3 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_04/ Multiplex Peripheral Pin
| 66 | I/O I/O | General purpose I/O Port 6 bit 4 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_05/ Multiplex Peripheral Pin
| 67 | I/O I/O | General purpose I/O Port 6 bit 5 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_06/ Multiplex Peripheral Pin
| 68 | I/O I/O | General purpose I/O Port 6 bit 6 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P6_07/ Multiplex Peripheral Pin
| 69 | I/O I/O | General purpose I/O Port 6 bit 7 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_00/ Multiplex Peripheral Pin
| 70 | I/O I/O | General purpose I/O Port 7 bit 0 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_01/ Multiplex Peripheral Pin
| 71 | I/O I/O | General purpose I/O Port 7 bit 1 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_02/ Multiplex Peripheral Pin
| 72 | I/O I/O | General purpose I/O Port 7 bit 2 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_03/ Multiplex Peripheral Pin
| 73 | I/O I/O | General purpose I/O Port 7 bit 3 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_04/ Multiplex Peripheral Pin
| 74 | I/O I/O | General purpose I/O Port 7 bit 4 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_05/ Multiplex Peripheral Pin
| 75 | I/O I/O | General purpose I/O Port 7 bit 5 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_06/ Multiplex Peripheral Pin
| 76 | I/O I/O | General purpose I/O Port 7 bit 6 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P7_07/ Multiplex Peripheral Pin
| 77 | I/O I/O | General purpose I/O Port 7 bit 7 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
VDD33_3 | 78 | S | I/O power supply pins | - |
CVDD12 | 79 | S | 1.2V core power | - |
GPIO_P8_00/ Multiplex Peripheral Pin
| 80 | I/O I/O | General purpose I/O Port 8 bit 0 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
GPIO_P8_01/ Multiplex Peripheral Pin/ SD_D1 | 81 | I/O I/O | General purpose I/O Port 8 bit 1 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD data pin1 | 8 |
GPIO_P8_02/ Multiplex Peripheral Pin/ SD_D0 | 82 | I/O I/O | General purpose I/O Port 8 bit 2 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD data pin0 | 8 |
GPIO_P8_03/ Multiplex Peripheral Pin/ SD_CLK | 83 | I/O I/O | General purpose I/O Port 8 bit 3 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD CLK pin | 8 |
GPIO_P8_04/ Multiplex Peripheral Pin/ SD_CMD | 84 | I/O I/O | General purpose I/O Port 8 bit 4 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD CMD pin | 8 |
GPIO_P8_05/ Multiplex Peripheral Pin/ SD_D3 | 85 | I/O I/O | General purpose I/O Port 8 bit 5 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD data pin3 | 8 |
GPIO_P8_06/ Multiplex Peripheral Pin/ SD_D2 | 86 | I/O I/O | General purpose I/O Port 8 bit 6 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. SDCARD data pin2 | 8 |
GPIO_P8_07/ Multiplex Peripheral Pin
| 87 | I/O I/O | General purpose I/O Port 8 bit 7 Multiplex Peripheral Pin For pin Multiplex function, please refer to Chapter 5. | 8 |
EMMC_CMD | 88 | I/O | EMMC command pin | - |
EMMC_D5 | 89 | I/O | EMMC data pin5 | - |
EMMC_D3 | 90 | I/O | EMMC data pin3 | - |
EMMC_D4 | 91 | I/O | EMMC data pin4 | - |
EMMC_D0/ SPI_NAND_D0 | 92 | I/O I/O | EMMC data pin0 SPI_NAND_D0 For pin Multiplex function, please refer to Chapter 5. | - |
EMMC_D1/ SPI_NAND_D2 | 93 | I/O I/O | EMMC data pin10 SPI_NAND_D2 For pin Multiplex function, please refer to Chapter 5. | - |
EMMC_CLK/ SPI_NAND_CLK | 94 | I/O I/O | eMMC clock pin SPI_NAND_CLK For pin Multiplex function, please refer to Chapter 5. | - |
EMMC_D2/ SPI_NAND_D1
| 95 | I/O I/O I/O | EMMC data pin2 SPI_NAND_D1 For pin Multiplex function, please refer to Chapter 5. | - |
EMMC_D7/ SPI_NAND_D3 | 96 | I/O I/O I/O | EMMC data pin7 SPI_NAND_D3 For pin Multiplex function, please refer to Chapter 5. | - |
EMMC_D6/ SPI_NAND_CEN
| 97 | I/O I/O I/O | EMMC data pin6 SPI_NAND_CEN For pin Multiplex function, please refer to Chapter 5. | - |
UA0_TX | 98 | I/O | Universal Asynchronous Receiver/Transmitter port0 TX | - |
UA0_RX | 99 | I/O | Universal Asynchronous Receiver/Transmitter port0 RX | - |
USB0_VBUS_EN | 100 | O | USB0 VBUS Enable | - |
USB1_VBUS_EN | 101 | O | USB1 VBUS Enable | - |
SWD_CLK/ SPI_NOR_D2 | 102 | I/O I/O | Serial Wire Debug clock pin SPI_NOR_D2 | - |
SWD_DAT/ SPI_NOR_CLK | 103 | I/O I/O | Serial Wire Debug data pin SPI_NOR_CLK | - |
JTAG_TDO_A926/ JTAG_TDO_8051/ SPI_NOR_D1 | 104 | I/O I/O I/O | Joint Test Action Group_Test Data Output for A926 Joint Test Action Group_Test Data Output for 8051 SPI_NOR_D1 | - |
JTAG_RTCK_A926/ JTAG_ RTCK _8051/ SPI_NOR_D3 | 105 | I/O I/O I/O | Joint Test Action Group_Test Clock Output for A926 Joint Test Action Group_Test Clock Output for 8051 SPI_NOR_D3 | - |
JTAG_TCK_A926/ JTAG_ TCK _8051/ SPI_NOR_CS | 106 | I/O I/O I/O | Joint Test Action Group_Test clock Output for A926 Joint Test Action Group_Test clock Output for 8051 SPI_NOR_CS | - |
JTAG_TMS_A926/ JTAG_ TMS _8051/ SPI_NOR_D0 | 107 | I/O I/O I/O | Joint Test Action Group_Test mode select for A926 Joint Test Action Group_Test mode select for 8051 SPI_NOR_D0 | - |
CVDD12 | 108 | S | DDR PLL Power 1.2V | - |
VDD33_4 | 109 | S | SSTL reference voltage | - |
XTAL_IN | 110 | I | 27MHz Crystal PAD input | - |
XTAL_OUT | 111 | I | 27MHz Crystal PAD output | - |
JTAG_TDI_A926/ JTAG_ TDI _8051/ IV_MX[2] | 112 | I/O I/O I/O | Joint Test Action Group_Test Data Input for A926 Joint Test Action Group_Test Data Input for 8051 HW_CFG pin at reset | - |
JTAG_TRST_A926/ JTAG_ TRST _8051/ IV_MX[6] | 113 | I/O I/O I/O | Joint Test Action Group_Test Reset for A926 Joint Test Action Group_Test Reset for 8051 HW_CFG pin at reset | - |
IV_MX[0] | 114 | I/O | HW_CFG pin at reset | - |
WAKE_IN/ IV_MX[1] | 115 | I I/O | Wakeup Input pin HW_CFG pin at reset | - |
IV_MX[3] | 116 | I/O | HW_CFG pin at reset | - |
IV_MX[4] | 117 | I/O | HW_CFG pin at reset | - |
IV_MX[5] | 118 | I/O | HW_CFG pin at reset | - |
RESET | 119 | I/O | System Reset | - |
PWR_EN | 120 | I/O | Power enable output pin | - |
AO33V | 121 | S | 3.3V power for AO domain | - |
RTC_VBAT | 122 | S | Battery supply voltage | - |
XTAL32K_IN | 123 | I/O | 32KHz Crystal PAD input | - |
XTAL32K_OUT | 124 | I/O | 32KHz Crystal PAD output | - |
USB0_VBUS | 125 | I | USB0 VBUS | - |
USB0_ID | 126 | I/O | USB0 ID | - |
USB0_DM | 127 | I/O | USB0 bus D- | - |
USB0_DP | 128 | I/O | USB0 bus D+ | - |
USB_VDD33 | 129 | S | 3.3V power for USB PLL and USB transceiver | - |
USB1_DP | 130 | I/O | USB1 bus D- | - |
USB1_DM | 131 | I/O | USB1 bus D+ | - |
USB1_ID | 132 | I/O | USB1 ID | - |
USB1_VBUS | 133 | I | USB1 VBUS | - |
HDMITX_CN | 134 | I/O | HDMITX Clock- | - |
HDMITX_CP | 135 | I/O | HDMITX Clock+ | - |
HDMITX_PLL_AVDD12 | 136 | S | HDMITX PLL 1.2V power | - |
HDMITX_DN0 | 137 | I/O | HDMITX Data0- | - |
HDMITX_DP0 | 138 | I/O | HDMITX Data0+ | - |
HDMITX_DN1 | 139 | I/O | HDMITX Data1- | - |
HDMITX_DP1 | 140 | I/O | HDMITX Data1+ | - |
HDMITX_DN2 | 141 | I/O | HDMITX Data2- | - |
HDMITX_DP2 | 142 | I/O | HDMITX Data2+ | - |
MIPI_D3N | 143 | I/O | MIPI Data3- | - |
MIPI_D3P | 144 | I/O | MIPI Data3+ | - |
MIPI_D1N | 145 | I/O | MIPI Data1- | - |
MIPI_D1P | 146 | I/O | MIPI Data1+ | - |
MIPI_SN | 147 | I/O | MIPI Clock- | - |
MIPI_SP | 148 | I/O | MIPI Clock+ | - |
MIPI_D0N | 149 | I/O | MIPI Data0- | - |
MIPI_D0P | 150 | I/O | MIPI Data0+ | - |
MIPI_D2N | 151 | I/O | MIPI Data2- | - |
MIPI_D2P | 152 | I/O | MIPI Data2+ | - |
MIPIAVDD | 153 | S | MIPI 1.2V power | - |
CVDD12 | 154 | S | 1.2V core power | - |
PLL_AVDD33 | 155 | S | PLL 3.3V power | - |
PLL_CVDD12 | 156 | S | PLL 1.2V power | - |
DDR3-K-VDDQ | 157 | S | DDR3 KGD IO power | - |
DDR3-PHY-VDDQ | 158 | S | DDR3-PHY IO power | - |
DDR3-PHY-12Core | 159 | S | DDR3-PHY core power | - |
DDR3-PHY-VDDQ | 160 | S | DDR3-PHY IO power | - |
DDR3-PHY-1.2Core | 161 | S | DDR3-PHY core power | - |
DDR3-PHY-VDDQ | 162 | S | DDR3-PHY IO power | - |
DDR3-PHY-3.3PLL | 163 | S | DDR3-PHY PLL power | - |
DDR3-PHY-VREF | 164 | S | DDR3-PHY reference voltage | - |
DDR3-PHY-PZQ | 165 | S | DDR3-PHY external reference resistor | - |
DDR3-K-VDDQ | 166 | S | DDR3 KGD IO power | - |
DCDC15_VI_VDD33 | 167 | S | DCDC-15 3.3V power input | - |
DCDC15_VO | 168 | S | DCDC-15 power output | - |
DCDC15_GND | 169 | S | DCDC-15 Ground | - |
DCDC12_GND | 170 | S | DCDC-12 Ground | - |
DCDC12_VO | 171 | S | DCDC-12 power output | - |
DCDC12_VI_VDD33 | 172 | S | DCDC-12 3.3V power input | - |
OTP_AVDDQ | 173 | S | OTP VDDQ power. OTP_AVDDQ should be pull up to 2.5V for OTP programming. Please pull down to GND in the normal case. Detail operation please refer to OTP tool user guide. | - |
GPIO_P0_00 | 174 | I/O | General purpose I/O Port 0 bit 0 | 16 |
GPIO_P0_01 | 175 | I/O | General purpose I/O Port 0 bit 1 | 16 |
GPIO_P0_02/ FBIO_0 | 176 | I/O I/O | General purpose I/O Port 0 bit 2 FPGA Bus IO Interface bit 0 For pin Multiplex function, please refer to Chapter 5. | 16 |
Table 2. Pin Descriptions
4.4 Bootstrap Pins
The states of the bootstrap pins are latched at system reset and configure the SP7021. There are 7 bootstrap pins to control boot mode, they are listed in table 3. The mode selected methods show in table 4.
Pin Name | LQFP 176 Pin No | Type | Description(Multiplex Pins in this interface Shown in Bold) | Drive (mA) |
IV_MX[2] | 112 | I/O | HW_CFG pin at reset | - |
IV_MX[6] | 113 | I/O | HW_CFG pin at reset | - |
IV_MX[0] | 114 | I/O | HW_CFG pin at reset | - |
IV_MX[1] | 115 | I/O | HW_CFG pin at reset | - |
IV_MX[3] | 116 | I/O | HW_CFG pin at reset | - |
IV_MX[4] | 117 | I/O | HW_CFG pin at reset | - |
IV_MX[5] | 118 | I/O | HW_CFG pin at reset | - |
Table 3. Bootstrap Pins
Symbol explanation:
1: Mean pull up
0: Mean pull down
-: Mean don’t care
ISP: Mean in system programming
Mode Select | MX[6] | MX[5] | MX[4] | MX[3] | MX[2] | MX[1] | MX[0] |
EMMC_boot | 1 | 1 | 1 | 1 | 1 | - | - |
- | 1 | 1 | 1 | 0 | 1 | - | - |
- | 1 | 1 | 0 | 1 | 1 | - | - |
EXT_BOOT | 1 | 1 | 0 | 0 | 1 | - | - |
USB_ISP (only usb port0) | 1 | 0 | 1 | 1 | 1 | - | - |
Auto Scan Boot by CA7 uart-> spi-nor-> eMMC ->spi-nand-> SDCard-> uart…..loop | 1 | 0 | 1 | 0 | 1 | - | - |
- | 1 | 0 | 0 | 1 | 1 | - | - |
SPI-NOR_BOOT | 1 | 0 | 0 | 0 | 1 | - | - |
UART_ISP | 0 | 1 | 1 | 1 | 1 | - | - |
- | 0 | 1 | 1 | 0 | 1 | - | - |
- | 0 | 1 | 0 | 1 | 1 | - | - |
SPI-NAND_BOOT | 0 | 1 | 0 | 0 | 1 | - | - |
SDCARD_ISP | 0 | 0 | 1 | 1 | 1 | - | - |
- | 0 | 0 | 1 | 0 | 1 | - | - |
- | 0 | 0 | 0 | 1 | 1 | - | - |
Auto Scan Boot by A926 uart-> spi-nor-> eMMC ->spi-nand-> SDCard-> uart…..loop | 0 | 0 | 0 | 0 | 1 | - | - |
Table 4. Bootstrap mode select